Merge "ARM: dts: msm: Add CNSS2 node for shima" (84680892) · Commits · e / devices / android_kernel_fairphone_FP5

qcom/shima-pinctrl.dtsi

+30 −0

Original line number	Diff line number	Diff line
		@@ -2916,6 +2916,36 @@
		};
		};
		};

		cnss_pins {
		cnss_wlan_en_active: cnss_wlan_en_active {
		mux {
		pins = "gpio64";
		function = "gpio";
		};

		config {
		pins = "gpio64";
		drive-strength = <16>;
		output-high;
		bias-pull-up;
		};
		};

		cnss_wlan_en_sleep: cnss_wlan_en_sleep {
		mux {
		pins = "gpio64";
		function = "gpio";
		};

		config {
		pins = "gpio64";
		drive-strength = <2>;
		output-low;
		bias-pull-down;
		};
		};
		};
		};
		};

qcom/shima.dtsi

+172 −0

Original line number	Diff line number	Diff line
		@@ -341,6 +341,14 @@
		size = <0 0xA000000>;
		};

		cnss_wlan_mem: cnss_wlan_region {
		compatible = "shared-dma-pool";
		alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;
		reusable;
		alignment = <0x0 0x400000>;
		size = <0x0 0x1400000>;
		};

		/* global autoconfigured region for contiguous allocations */
		linux,cma {
		compatible = "shared-dma-pool";
		@@ -2333,6 +2341,148 @@
		bits = <5 1>;
		};
		};

		wlan: qcom,cnss-qca6490@b0000000 {
		status = "disabled";
		compatible = "qcom,cnss-qca6490";
		reg = <0xb0000000 0x10000>;
		reg-names = "smmu_iova_ipa";
		wlan-en-gpio = <&tlmm 64 0>;
		pinctrl-names = "wlan_en_active", "wlan_en_sleep";
		pinctrl-0 = <&cnss_wlan_en_active>;
		pinctrl-1 = <&cnss_wlan_en_sleep>;
		qcom,wlan-rc-num = <0>;
		qcom,wlan-ramdump-dynamic = <0x420000>;
		qcom,wlan-cbc-enabled;

		vdd-wlan-aon-supply = <&S2C>;
		qcom,vdd-wlan-aon-config = <950000 952000 0 0 1>;
		vdd-wlan-dig-supply = <&S2C>;
		qcom,vdd-wlan-dig-config = <950000 952000 0 0 1>;
		vdd-wlan-io-supply = <&S10B>;
		qcom,vdd-wlan-io-config = <1800000 1800000 0 0 1>;
		vdd-wlan-rfa1-supply = <&S11B>;
		qcom,vdd-wlan-rfa1-config = <1880000 1880000 0 0 1>;
		vdd-wlan-rfa2-supply = <&S12B>;
		qcom,vdd-wlan-rfa2-config = <1350000 1350000 0 0 1>;
		wlan-ant-switch-supply = <&L11C>;
		qcom,wlan-ant-switch-config = <2800000 2800000 0 0 0>;

		mhi,max-channels = <30>;
		mhi,timeout = <10000>;
		mhi,buffer-len = <0x8000>;
		mhi,m2-no-db-access;

		mhi_channels {
		#address-cells = <1>;
		#size-cells = <0>;

		mhi_chan@0 {
		reg = <0>;
		label = "LOOPBACK";
		mhi,num-elements = <32>;
		mhi,event-ring = <1>;
		mhi,chan-dir = <1>;
		mhi,data-type = <0>;
		mhi,doorbell-mode = <2>;
		mhi,ee = <0x14>;
		};

		mhi_chan@1 {
		reg = <1>;
		label = "LOOPBACK";
		mhi,num-elements = <32>;
		mhi,event-ring = <1>;
		mhi,chan-dir = <2>;
		mhi,data-type = <0>;
		mhi,doorbell-mode = <2>;
		mhi,ee = <0x14>;
		};

		mhi_chan@4 {
		reg = <4>;
		label = "DIAG";
		mhi,num-elements = <32>;
		mhi,event-ring = <1>;
		mhi,chan-dir = <1>;
		mhi,data-type = <0>;
		mhi,doorbell-mode = <2>;
		mhi,ee = <0x14>;
		};

		mhi_chan@5 {
		reg = <5>;
		label = "DIAG";
		mhi,num-elements = <32>;
		mhi,event-ring = <1>;
		mhi,chan-dir = <2>;
		mhi,data-type = <0>;
		mhi,doorbell-mode = <2>;
		mhi,ee = <0x14>;
		};

		mhi_chan@20 {
		reg = <20>;
		label = "IPCR";
		mhi,num-elements = <32>;
		mhi,event-ring = <1>;
		mhi,chan-dir = <1>;
		mhi,data-type = <1>;
		mhi,doorbell-mode = <2>;
		mhi,ee = <0x14>;
		mhi,auto-start;
		};

		mhi_chan@21 {
		reg = <21>;
		label = "IPCR";
		mhi,num-elements = <32>;
		mhi,event-ring = <1>;
		mhi,chan-dir = <2>;
		mhi,data-type = <0>;
		mhi,doorbell-mode = <2>;
		mhi,ee = <0x14>;
		mhi,auto-queue;
		mhi,auto-start;
		};
		};

		mhi_events {
		mhi_event@0 {
		mhi,num-elements = <32>;
		mhi,intmod = <0>;
		mhi,msi = <1>;
		mhi,priority = <1>;
		mhi,brstmode = <2>;
		mhi,data-type = <1>;
		};

		mhi_event@1 {
		mhi,num-elements = <256>;
		mhi,intmod = <0>;
		mhi,msi = <2>;
		mhi,priority = <1>;
		mhi,brstmode = <2>;
		};

		mhi_event@2 {
		mhi,num-elements = <32>;
		mhi,intmod = <0>;
		mhi,msi = <0>;
		mhi,priority = <2>;
		mhi,brstmode = <2>;
		mhi,data-type = <3>;
		};
		};

		mhi_devices {
		mhi_qrtr {
		mhi,chan = "IPCR";
		qcom,net-id = <0>;
		qcom,low-latency;
		};
		};
		};
		};

		#include "shima-pinctrl.dtsi"
		@@ -2351,6 +2501,28 @@
		#include "shima-gpu.dtsi"
		#include "shima-audio.dtsi"

		&pcie0_rp {
		#address-cells = <5>;
		#size-cells = <0>;

		cnss_pci: cnss_pci {
		reg = <0 0 0 0 0>;
		qcom,iommu-group = <&cnss_pci_iommu_group>;
		memory-region = <&cnss_wlan_mem>;

		#address-cells = <1>;
		#size-cells = <1>;

		cnss_pci_iommu_group: cnss_pci_iommu_group {
		qcom,iommu-dma-addr-pool = <0xa0000000 0x10000000>;
		qcom,iommu-dma = "fastmap";
		qcom,iommu-pagetable = "coherent";
		qcom,iommu-faults = "stall-disable", "HUPCF", "no-CFRE",
		"non-fatal";
		};
		};
		};

		&gcc_pcie_0_gdsc {
		status = "ok";
		};