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Commit 82f91468 authored by Bhawanpreet Lakha's avatar Bhawanpreet Lakha Committed by Alex Deucher
Browse files

drm/amd/display: Add pp_smu functions for Renoir 



This defines the interface for communicating requirements
between DC and powerplay.

Acked-by: default avatarHarry Wentland <harry.wentland@amd.com>
Signed-off-by: default avatarBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent ab618312

drivers/gpu/drm/amd/display/dc/dm_pp_smu.h

+47 −0
Original line number Diff line number Diff line
@@ -44,6 +44,9 @@ enum pp_smu_ver { 
#ifndef CONFIG_TRIM_DRM_AMD_DC_DCN2_0

	PP_SMU_VER_NV,

#endif

#if defined(CONFIG_DRM_AMD_DC_DCN2_1)

	PP_SMU_VER_RN,

#endif



	PP_SMU_VER_MAX

};
@@ -246,6 +249,47 @@ struct pp_smu_funcs_nv { 
};

#endif



#if defined(CONFIG_DRM_AMD_DC_DCN2_1)



#define PP_SMU_NUM_SOCCLK_DPM_LEVELS  8

#define PP_SMU_NUM_DCFCLK_DPM_LEVELS  4

#define PP_SMU_NUM_FCLK_DPM_LEVELS    4

#define PP_SMU_NUM_MEMCLK_DPM_LEVELS  4



struct dpm_clock {

  uint32_t  Freq;    // In MHz

  uint32_t  Vol;     // Millivolts with 2 fractional bits

};





/* this is a copy of the structure defined in smuxx_driver_if.h*/

struct dpm_clocks {

	struct dpm_clock DcfClocks[PP_SMU_NUM_DCFCLK_DPM_LEVELS];

	struct dpm_clock SocClocks[PP_SMU_NUM_SOCCLK_DPM_LEVELS];

	struct dpm_clock FClocks[PP_SMU_NUM_FCLK_DPM_LEVELS];

	struct dpm_clock MemClocks[PP_SMU_NUM_MEMCLK_DPM_LEVELS];

};





struct pp_smu_funcs_rn {

	struct pp_smu pp_smu;



	/*

	 * reader and writer WM's are sent together as part of one table

	 *

	 * PPSMC_MSG_SetDriverDramAddrHigh

	 * PPSMC_MSG_SetDriverDramAddrLow

	 * PPSMC_MSG_TransferTableDram2Smu

	 *

	 */

	enum pp_smu_status (*set_wm_ranges)(struct pp_smu *pp,

			struct pp_smu_wm_range_sets *ranges);



	enum pp_smu_status (*get_dpm_clock_table) (struct pp_smu *pp,

			struct dpm_clocks *clock_table);

};

#endif



struct pp_smu_funcs {

	struct pp_smu ctx;

	union {
@@ -253,6 +297,9 @@ struct pp_smu_funcs { 
#ifndef CONFIG_TRIM_DRM_AMD_DC_DCN2_0

		struct pp_smu_funcs_nv nv_funcs;

#endif

#if defined(CONFIG_DRM_AMD_DC_DCN2_1)

		struct pp_smu_funcs_rn rn_funcs;

#endif



	};

};