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Commit 82e7ce81 authored by Markos Chandras's avatar Markos Chandras
Browse files

MIPS: asm: local: Set the appropriate ISA level for MIPS R6



MIPS R6 changed the opcodes for LL/SC instructions so we need to set
the appropriate ISA level.

Cc: Matthew Fortune <Matthew.Fortune@imgtec.com>
Signed-off-by: default avatarMarkos Chandras <markos.chandras@imgtec.com>
parent 5753762c
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+3 −2
Original line number Diff line number Diff line
@@ -5,6 +5,7 @@
#include <linux/bitops.h>
#include <linux/atomic.h>
#include <asm/cmpxchg.h>
#include <asm/compiler.h>
#include <asm/war.h>

typedef struct
@@ -47,7 +48,7 @@ static __inline__ long local_add_return(long i, local_t * l)
		unsigned long temp;

		__asm__ __volatile__(
		"	.set	arch=r4000				\n"
		"	.set	"MIPS_ISA_ARCH_LEVEL"			\n"
		"1:"	__LL	"%1, %2		# local_add_return	\n"
		"	addu	%0, %1, %3				\n"
			__SC	"%0, %2					\n"
@@ -92,7 +93,7 @@ static __inline__ long local_sub_return(long i, local_t * l)
		unsigned long temp;

		__asm__ __volatile__(
		"	.set	arch=r4000				\n"
		"	.set	"MIPS_ISA_ARCH_LEVEL"			\n"
		"1:"	__LL	"%1, %2		# local_sub_return	\n"
		"	subu	%0, %1, %3				\n"
			__SC	"%0, %2					\n"