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Commit 8264fd04 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'drm-next-2019-03-15' of git://anongit.freedesktop.org/drm/drm 

Pull drm fixes and updates from Dave Airlie:
 "A few various fixes pulls and one late etnaviv pull but it was nearly
  all fixes anyways.

  etnaviv:
   - late next pull
   - mmu mapping fix
   - build non-ARM arches
   - misc fixes

  i915:
   - HDCP state handling fix
   - shrinker interaction fix
   - atomic state leak fix

  qxl:
   - kick out framebuffers early fix

  amdgpu:
   - Powerplay fixes
   - DC fixes
   - BACO turned off for now on vega20
   - Locking fix
   - KFD MQD fix
   - gfx9 golden register updates"

* tag 'drm-next-2019-03-15' of git://anongit.freedesktop.org/drm/drm: (43 commits)
  drm/amdgpu: Update gc golden setting for vega family
  drm/amd/powerplay: correct power reading on fiji
  drm/amd/powerplay: set max fan target temperature as 105C
  drm/i915: Relax mmap VMA check
  drm/i915: Fix atomic state leak when resetting HDMI link
  drm/i915: Acquire breadcrumb ref before cancelling
  drm/i915/selftests: Always free spinner on __sseu_prepare error
  drm/i915: Reacquire priolist cache after dropping the engine lock
  drm/i915: Protect i915_active iterators from the shrinker
  drm/i915: HDCP state handling in ddi_update_pipe
  drm/qxl: remove conflicting framebuffers earlier
  drm/fb-helper: call vga_remove_vgacon automatically.
  drm: move i915_kick_out_vgacon to vgaarb
  drm/amd/display: don't call dm_pp_ function from an fpu block
  drm: add __user attribute to ptr_to_compat()
  drm/amdgpu: clear PDs/PTs only after initializing them
  drm/amd/display: Pass app_tf by value rather than by reference
  Revert "drm/amdgpu: use BACO reset on vega20 if platform support"
  drm/amd/powerplay: show the right override pcie parameters
  drm/amd/powerplay: honor the OD settings
  ...
parents de578188 0f1d37e6

MAINTAINERS

+1 −1
Original line number Diff line number Diff line
@@ -5278,7 +5278,7 @@ DRM DRIVERS FOR VIVANTE GPU IP 
M:	Lucas Stach <l.stach@pengutronix.de>

R:	Russell King <linux+etnaviv@armlinux.org.uk>

R:	Christian Gmeiner <christian.gmeiner@gmail.com>

L:	etnaviv@lists.freedesktop.org

L:	etnaviv@lists.freedesktop.org (moderated for non-subscribers)

L:	dri-devel@lists.freedesktop.org

S:	Maintained

F:	drivers/gpu/drm/etnaviv/

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

+6 −5
Original line number Diff line number Diff line
@@ -947,10 +947,6 @@ int amdgpu_vm_alloc_pts(struct amdgpu_device *adev, 
		if (r)

			return r;



		r = amdgpu_vm_clear_bo(adev, vm, pt, cursor.level, ats);

		if (r)

			goto error_free_pt;



		if (vm->use_cpu_for_update) {

			r = amdgpu_bo_kmap(pt, NULL);

			if (r)
@@ -963,6 +959,10 @@ int amdgpu_vm_alloc_pts(struct amdgpu_device *adev, 
		pt->parent = amdgpu_bo_ref(cursor.parent->base.bo);



		amdgpu_vm_bo_base_init(&entry->base, vm, pt);



		r = amdgpu_vm_clear_bo(adev, vm, pt, cursor.level, ats);

		if (r)

			goto error_free_pt;

	}



	return 0;
@@ -3033,13 +3033,14 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm, 
	if (r)

		goto error_unreserve;



	amdgpu_vm_bo_base_init(&vm->root.base, vm, root);



	r = amdgpu_vm_clear_bo(adev, vm, root,

			       adev->vm_manager.root_level,

			       vm->pte_support_ats);

	if (r)

		goto error_unreserve;



	amdgpu_vm_bo_base_init(&vm->root.base, vm, root);

	amdgpu_bo_unreserve(vm->root.base.bo);



	if (pasid) {

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

+1 −0
Original line number Diff line number Diff line
@@ -220,6 +220,7 @@ static const struct soc15_reg_golden golden_settings_gc_9_1_rv2[] = 


static const struct soc15_reg_golden golden_settings_gc_9_x_common[] =

{

	SOC15_REG_GOLDEN_VALUE(GC, 0, mmCP_SD_CNTL, 0xffffffff, 0x000001ff),

	SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_CAM_INDEX, 0xffffffff, 0x00000000),

	SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_CAM_DATA, 0xffffffff, 0x2544c382)

};

drivers/gpu/drm/amd/amdgpu/psp_v3_1.c

+1 −3
Original line number Diff line number Diff line
@@ -500,9 +500,7 @@ static bool psp_v3_1_smu_reload_quirk(struct psp_context *psp) 
	struct amdgpu_device *adev = psp->adev;

	uint32_t reg;



	reg = smnMP1_FIRMWARE_FLAGS | 0x03b00000;

	WREG32_SOC15(NBIO, 0, mmPCIE_INDEX2, reg);

	reg = RREG32_SOC15(NBIO, 0, mmPCIE_DATA2);

	reg = RREG32_PCIE(smnMP1_FIRMWARE_FLAGS | 0x03b00000);

	return (reg & MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED_MASK) ? true : false;

}

drivers/gpu/drm/amd/amdgpu/soc15.c

+0 −1
Original line number Diff line number Diff line
@@ -461,7 +461,6 @@ static int soc15_asic_reset(struct amdgpu_device *adev) 


	switch (adev->asic_type) {

	case CHIP_VEGA10:

	case CHIP_VEGA20:

		soc15_asic_get_baco_capability(adev, &baco_reset);

		break;

	default: