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Commit 82637e80 authored by Stephen Hemminger's avatar Stephen Hemminger Committed by David S. Miller
Browse files

sky2: fix Wake On Lan interaction with BIOS 

This patch disables config mode access after clearing PCI settings.
Some BIOS's seem to not do WOL if config bit still set.

Fixes: http://bugzilla.kernel.org/show_bug.cgi?id=9721



Signed-off-by: default avatarStephen Hemminger <shemminger@linux-foundation.org>
Signed-off-by: default avatarJeff Garzik <jeff@garzik.org>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent a7bffe72

drivers/net/sky2.c

+8 −1
Original line number Diff line number Diff line
@@ -623,6 +623,7 @@ static void sky2_phy_power(struct sky2_hw *hw, unsigned port, int onoff) 
	static const u32 phy_power[] = { PCI_Y2_PHY1_POWD, PCI_Y2_PHY2_POWD };

	static const u32 coma_mode[] = { PCI_Y2_PHY1_COMA, PCI_Y2_PHY2_COMA };



	sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);

	reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);

	/* Turn on/off phy power saving */

	if (onoff)
@@ -634,7 +635,8 @@ static void sky2_phy_power(struct sky2_hw *hw, unsigned port, int onoff) 
		reg1 |= coma_mode[port];



	sky2_pci_write32(hw, PCI_DEV_REG1, reg1);

	reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);

	sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);

	sky2_pci_read32(hw, PCI_DEV_REG1);



	udelay(100);

}
@@ -2437,6 +2439,7 @@ static void sky2_hw_intr(struct sky2_hw *hw) 
	if (status & (Y2_IS_MST_ERR | Y2_IS_IRQ_STAT)) {

		u16 pci_err;



		sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);

		pci_err = sky2_pci_read16(hw, PCI_STATUS);

		if (net_ratelimit())

			dev_err(&pdev->dev, "PCI hardware error (0x%x)\n",
@@ -2444,12 +2447,14 @@ static void sky2_hw_intr(struct sky2_hw *hw) 


		sky2_pci_write16(hw, PCI_STATUS,

				      pci_err | PCI_STATUS_ERROR_BITS);

		sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);

	}



	if (status & Y2_IS_PCI_EXP) {

		/* PCI-Express uncorrectable Error occurred */

		u32 err;



		sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);

		err = sky2_read32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS);

		sky2_write32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS,

			     0xfffffffful);
@@ -2457,6 +2462,7 @@ static void sky2_hw_intr(struct sky2_hw *hw) 
			dev_err(&pdev->dev, "PCI Express error (0x%x)\n", err);



		sky2_read32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS);

		sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);

	}



	if (status & Y2_HWE_L1_MASK)
@@ -2832,6 +2838,7 @@ static void sky2_reset(struct sky2_hw *hw) 
	}



	sky2_power_on(hw);

	sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);



	for (i = 0; i < hw->ports; i++) {

		sky2_write8(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_SET);