Commit 814b756d authored Jul 27, 2022 by Fudong Wang Committed by Greg Kroah-Hartman Sep 05, 2022

drm/amd/display: clear optc underflow before turn off odm clock



[ Upstream commit b2a93490201300a749ad261b5c5d05cb50179c44 ]

[Why]
After ODM clock off, optc underflow bit will be kept there always and clear not work.
We need to clear that before clock off.

[How]
Clear that if have when clock off.

Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Fudong Wang <Fudong.Wang@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

parent a06e4eb6

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c

+5 −0

Original line number	Diff line number	Diff line
		@@ -425,6 +425,11 @@ void optc1_enable_optc_clock(struct timing_generator *optc, bool enable)
		OTG_CLOCK_ON, 1,
		1, 1000);
		} else {

		//last chance to clear underflow, otherwise, it will always there due to clock is off.
		if (optc->funcs->is_optc_underflow_occurred(optc) == true)
		optc->funcs->clear_optc_underflow(optc);

		REG_UPDATE_2(OTG_CLOCK_CONTROL,
		OTG_CLOCK_GATE_DIS, 0,
		OTG_CLOCK_EN, 0);