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Commit 809a8cfb authored by Prakash Gupta's avatar Prakash Gupta
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ARM: dts: msm: update apps smmu interrupt list 

It has been observed that multiple global combine fault is reported along
with S1 fault.

example:
[<0000000023afa98c>] irq_default_primary_handler threaded
[<000000002951795b>] arm_smmu_global_fault
Disabling IRQ #55
arm-smmu c600000.apps-smmu: FAR    = 0x0000000000000000
arm-smmu c600000.apps-smmu: PAR    = 0x0000000000000000
arm-smmu c600000.apps-smmu: FSR    = 0x40000402 [TF W SS ]
arm-smmu c600000.apps-smmu: TTBR0  = 0x0000000000000000
arm-smmu c600000.apps-smmu: TTBR1  = 0x0000000000000000
arm-smmu c600000.apps-smmu: SCTLR  = 0x00c000e7 ACTLR  = 0x00000001
arm-smmu c600000.apps-smmu: CBAR  = 0x0001f300
arm-smmu c600000.apps-smmu: MAIR0   = 0xf404ff44 MAIR1   = 0x000000e4

Fault count:
IRQ 55 100001     arm-smmu global fault

Remove unnecessary global interrupt from EL1 apps smmu interrupt list.

Change-Id: Ifda67dc5aee92d09a48cdf31d5e22cc2e234ed7a
parent 2cd79af5

qcom/msm-arm-smmu-holi.dtsi

+1 −2
Original line number Diff line number Diff line
@@ -45,12 +45,11 @@ 
		#iommu-cells = <2>;

		qcom,skip-init;

		qcom,use-3-lvl-tables;

		#global-interrupts = <2>;

		#global-interrupts = <1>;

		#size-cells = <1>;

		#address-cells = <1>;

		ranges;

		interrupts =	<GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>,

				<GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,

				<GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,

				<GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,

				<GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>,