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Commit 8023cf26 authored by Faiz Abbas's avatar Faiz Abbas Committed by Ulf Hansson
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mmc: sdhci_am654: Improve whitespace utilisation with regmap_*() calls 



Line wrapping with the regmap_*() functions is way more conservative
than required by the 80 character rule. Expand the function calls out to
use less number of lines.

Signed-off-by: default avatarFaiz Abbas <faiz_abbas@ti.com>
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent 65f1a0d3

drivers/mmc/host/sdhci_am654.c

+13 −21
Original line number Diff line number Diff line
@@ -88,8 +88,7 @@ static void sdhci_am654_set_clock(struct sdhci_host *host, unsigned int clock) 
	int ret;



	if (sdhci_am654->dll_on) {

		regmap_update_bits(sdhci_am654->base, PHY_CTRL1,

				   ENDLL_MASK, 0);

		regmap_update_bits(sdhci_am654->base, PHY_CTRL1, ENDLL_MASK, 0);



		sdhci_am654->dll_on = false;

	}
@@ -101,8 +100,7 @@ static void sdhci_am654_set_clock(struct sdhci_host *host, unsigned int clock) 
		mask = OTAPDLYENA_MASK | OTAPDLYSEL_MASK;

		val = (1 << OTAPDLYENA_SHIFT) |

		      (sdhci_am654->otap_del_sel << OTAPDLYSEL_SHIFT);

		regmap_update_bits(sdhci_am654->base, PHY_CTRL4,

				   mask, val);

		regmap_update_bits(sdhci_am654->base, PHY_CTRL4, mask, val);

		switch (clock) {

		case 200000000:

			sel50 = 0;
@@ -120,8 +118,7 @@ static void sdhci_am654_set_clock(struct sdhci_host *host, unsigned int clock) 
		/* Configure PHY DLL frequency */

		mask = SEL50_MASK | SEL100_MASK;

		val = (sel50 << SEL50_SHIFT) | (sel100 << SEL100_SHIFT);

		regmap_update_bits(sdhci_am654->base, PHY_CTRL5,

				   mask, val);

		regmap_update_bits(sdhci_am654->base, PHY_CTRL5, mask, val);

		/* Configure DLL TRIM */

		mask = DLL_TRIM_ICP_MASK;

		val = sdhci_am654->trm_icp << DLL_TRIM_ICP_SHIFT;
@@ -129,20 +126,17 @@ static void sdhci_am654_set_clock(struct sdhci_host *host, unsigned int clock) 
		/* Configure DLL driver strength */

		mask |= DR_TY_MASK;

		val |= sdhci_am654->drv_strength << DR_TY_SHIFT;

		regmap_update_bits(sdhci_am654->base, PHY_CTRL1,

				   mask, val);

		regmap_update_bits(sdhci_am654->base, PHY_CTRL1, mask, val);

		/* Enable DLL */

		regmap_update_bits(sdhci_am654->base, PHY_CTRL1,

				   ENDLL_MASK, 0x1 << ENDLL_SHIFT);

		regmap_update_bits(sdhci_am654->base, PHY_CTRL1, ENDLL_MASK,

				   0x1 << ENDLL_SHIFT);

		/*

		 * Poll for DLL ready. Use a one second timeout.

		 * Works in all experiments done so far

		 */

		ret = regmap_read_poll_timeout(sdhci_am654->base,

					 PHY_STAT1, val,

					 val & DLLRDY_MASK,

					 1000, 1000000);



		ret = regmap_read_poll_timeout(sdhci_am654->base, PHY_STAT1,

					       val, val & DLLRDY_MASK, 1000,

					       1000000);

		sdhci_am654->dll_on = true;

	}

}
@@ -208,8 +202,7 @@ static int sdhci_am654_init(struct sdhci_host *host) 


	/* Reset OTAP to default value */

	mask = OTAPDLYENA_MASK | OTAPDLYSEL_MASK;

	regmap_update_bits(sdhci_am654->base, PHY_CTRL4,

				   mask, 0x0);

	regmap_update_bits(sdhci_am654->base, PHY_CTRL4, mask, 0x0);



	regmap_read(sdhci_am654->base, PHY_STAT1, &val);

	if (~val & CALDONE_MASK) {
@@ -223,15 +216,14 @@ static int sdhci_am654_init(struct sdhci_host *host) 
	}



	/* Enable pins by setting IO mux to 0 */

	regmap_update_bits(sdhci_am654->base, PHY_CTRL1,

			   IOMUX_ENABLE_MASK, 0);

	regmap_update_bits(sdhci_am654->base, PHY_CTRL1, IOMUX_ENABLE_MASK, 0);



	/* Set slot type based on SD or eMMC */

	if (host->mmc->caps & MMC_CAP_NONREMOVABLE)

		ctl_cfg_2 = SLOTTYPE_EMBEDDED;



	regmap_update_bits(sdhci_am654->base, CTL_CFG_2,

			   SLOTTYPE_MASK, ctl_cfg_2);

	regmap_update_bits(sdhci_am654->base, CTL_CFG_2, SLOTTYPE_MASK,

			   ctl_cfg_2);



	return sdhci_add_host(host);

}