Loading drivers/gpu/msm/adreno-gpulist.h +32 −1 Original line number Diff line number Diff line /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2002,2007-2019, The Linux Foundation. All rights reserved. * Copyright (c) 2002,2007-2020, The Linux Foundation. All rights reserved. */ #define ANY_ID (~0) Loading Loading @@ -1438,6 +1438,36 @@ static const struct adreno_a6xx_core adreno_gpu_core_a610 = { .highest_bank_bit = 14, }; static const struct adreno_a6xx_core adreno_gpu_core_a660 = { { DEFINE_ADRENO_REV(ADRENO_REV_A660, 6, 6, 0, ANY_ID), .features = ADRENO_RPMH | ADRENO_GPMU | ADRENO_APRIV, .gpudev = &adreno_a6xx_gpudev, .gmem_base = 0, .gmem_size = SZ_1M + SZ_512K, .busy_mask = 0xfffffffe, .bus_width = 32, .snapshot_size = SZ_1M, }, .prim_fifo_threshold = 0x00300000, .pdc_address_offset = 0x0, .gmu_major = 2, .gmu_minor = 0, .sqefw_name = "a660_sqe.fw", .gmufw_name = "a660_gmu.bin", .zap_name = "a660_zap", .hwcg = NULL, .hwcg_count = 0, .vbif = a650_gbif_regs, .vbif_count = ARRAY_SIZE(a650_gbif_regs), .hang_detect_cycles = 0xcfffff, .veto_fal10 = true, .protected_regs = a620_protected_regs, .disable_tseskip = true, .highest_bank_bit = 15, .pdc_in_aop = true, }; static const struct adreno_gpu_core *adreno_gpulist[] = { &adreno_gpu_core_a306.base, &adreno_gpu_core_a306a.base, Loading @@ -1464,6 +1494,7 @@ static const struct adreno_gpu_core *adreno_gpulist[] = { &adreno_gpu_core_a640.base, &adreno_gpu_core_a650.base, &adreno_gpu_core_a650v2.base, &adreno_gpu_core_a660.base, &adreno_gpu_core_a680.base, &adreno_gpu_core_a612.base, &adreno_gpu_core_a616.base, Loading drivers/gpu/msm/adreno.h +4 −1 Original line number Diff line number Diff line Loading @@ -198,6 +198,7 @@ enum adreno_gpurev { ADRENO_REV_A630 = 630, ADRENO_REV_A640 = 640, ADRENO_REV_A650 = 650, ADRENO_REV_A660 = 660, ADRENO_REV_A680 = 680, }; Loading Loading @@ -1040,6 +1041,7 @@ ADRENO_TARGET(a620, ADRENO_REV_A620) ADRENO_TARGET(a630, ADRENO_REV_A630) ADRENO_TARGET(a640, ADRENO_REV_A640) ADRENO_TARGET(a650, ADRENO_REV_A650) ADRENO_TARGET(a660, ADRENO_REV_A660) ADRENO_TARGET(a680, ADRENO_REV_A680) /* Loading Loading @@ -1076,7 +1078,8 @@ static inline int adreno_is_a650_family(struct adreno_device *adreno_dev) { unsigned int rev = ADRENO_GPUREV(adreno_dev); return (rev == ADRENO_REV_A650 || rev == ADRENO_REV_A620); return (rev == ADRENO_REV_A650 || rev == ADRENO_REV_A620 || rev == ADRENO_REV_A660); } static inline int adreno_is_a620v1(struct adreno_device *adreno_dev) Loading Loading
drivers/gpu/msm/adreno-gpulist.h +32 −1 Original line number Diff line number Diff line /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2002,2007-2019, The Linux Foundation. All rights reserved. * Copyright (c) 2002,2007-2020, The Linux Foundation. All rights reserved. */ #define ANY_ID (~0) Loading Loading @@ -1438,6 +1438,36 @@ static const struct adreno_a6xx_core adreno_gpu_core_a610 = { .highest_bank_bit = 14, }; static const struct adreno_a6xx_core adreno_gpu_core_a660 = { { DEFINE_ADRENO_REV(ADRENO_REV_A660, 6, 6, 0, ANY_ID), .features = ADRENO_RPMH | ADRENO_GPMU | ADRENO_APRIV, .gpudev = &adreno_a6xx_gpudev, .gmem_base = 0, .gmem_size = SZ_1M + SZ_512K, .busy_mask = 0xfffffffe, .bus_width = 32, .snapshot_size = SZ_1M, }, .prim_fifo_threshold = 0x00300000, .pdc_address_offset = 0x0, .gmu_major = 2, .gmu_minor = 0, .sqefw_name = "a660_sqe.fw", .gmufw_name = "a660_gmu.bin", .zap_name = "a660_zap", .hwcg = NULL, .hwcg_count = 0, .vbif = a650_gbif_regs, .vbif_count = ARRAY_SIZE(a650_gbif_regs), .hang_detect_cycles = 0xcfffff, .veto_fal10 = true, .protected_regs = a620_protected_regs, .disable_tseskip = true, .highest_bank_bit = 15, .pdc_in_aop = true, }; static const struct adreno_gpu_core *adreno_gpulist[] = { &adreno_gpu_core_a306.base, &adreno_gpu_core_a306a.base, Loading @@ -1464,6 +1494,7 @@ static const struct adreno_gpu_core *adreno_gpulist[] = { &adreno_gpu_core_a640.base, &adreno_gpu_core_a650.base, &adreno_gpu_core_a650v2.base, &adreno_gpu_core_a660.base, &adreno_gpu_core_a680.base, &adreno_gpu_core_a612.base, &adreno_gpu_core_a616.base, Loading
drivers/gpu/msm/adreno.h +4 −1 Original line number Diff line number Diff line Loading @@ -198,6 +198,7 @@ enum adreno_gpurev { ADRENO_REV_A630 = 630, ADRENO_REV_A640 = 640, ADRENO_REV_A650 = 650, ADRENO_REV_A660 = 660, ADRENO_REV_A680 = 680, }; Loading Loading @@ -1040,6 +1041,7 @@ ADRENO_TARGET(a620, ADRENO_REV_A620) ADRENO_TARGET(a630, ADRENO_REV_A630) ADRENO_TARGET(a640, ADRENO_REV_A640) ADRENO_TARGET(a650, ADRENO_REV_A650) ADRENO_TARGET(a660, ADRENO_REV_A660) ADRENO_TARGET(a680, ADRENO_REV_A680) /* Loading Loading @@ -1076,7 +1078,8 @@ static inline int adreno_is_a650_family(struct adreno_device *adreno_dev) { unsigned int rev = ADRENO_GPUREV(adreno_dev); return (rev == ADRENO_REV_A650 || rev == ADRENO_REV_A620); return (rev == ADRENO_REV_A650 || rev == ADRENO_REV_A620 || rev == ADRENO_REV_A660); } static inline int adreno_is_a620v1(struct adreno_device *adreno_dev) Loading