Loading arch/x86/events/intel/lbr.c +4 −0 Original line number Diff line number Diff line Loading @@ -1272,4 +1272,8 @@ void intel_pmu_lbr_init_knl(void) x86_pmu.lbr_sel_mask = LBR_SEL_MASK; x86_pmu.lbr_sel_map = snb_lbr_sel_map; /* Knights Landing does have MISPREDICT bit */ if (x86_pmu.intel_cap.lbr_format == LBR_FORMAT_LIP) x86_pmu.intel_cap.lbr_format = LBR_FORMAT_EIP_FLAGS; } include/uapi/linux/perf_event.h +1 −1 Original line number Diff line number Diff line Loading @@ -144,7 +144,7 @@ enum perf_event_sample_format { PERF_SAMPLE_MAX = 1U << 20, /* non-ABI */ __PERF_SAMPLE_CALLCHAIN_EARLY = 1ULL << 63, __PERF_SAMPLE_CALLCHAIN_EARLY = 1ULL << 63, /* non-ABI; internal use */ }; /* Loading kernel/events/core.c +4 −0 Original line number Diff line number Diff line Loading @@ -5943,6 +5943,7 @@ perf_output_sample_ustack(struct perf_output_handle *handle, u64 dump_size, unsigned long sp; unsigned int rem; u64 dyn_size; mm_segment_t fs; /* * We dump: Loading @@ -5960,7 +5961,10 @@ perf_output_sample_ustack(struct perf_output_handle *handle, u64 dump_size, /* Data. */ sp = perf_user_stack_pointer(regs); fs = get_fs(); set_fs(USER_DS); rem = __output_copy_user(handle, (void *) sp, dump_size); set_fs(fs); dyn_size = dump_size - rem; perf_output_skip(handle, rem); Loading tools/arch/arm/include/uapi/asm/kvm.h +13 −0 Original line number Diff line number Diff line Loading @@ -27,6 +27,7 @@ #define __KVM_HAVE_GUEST_DEBUG #define __KVM_HAVE_IRQ_LINE #define __KVM_HAVE_READONLY_MEM #define __KVM_HAVE_VCPU_EVENTS #define KVM_COALESCED_MMIO_PAGE_OFFSET 1 Loading Loading @@ -125,6 +126,18 @@ struct kvm_sync_regs { struct kvm_arch_memory_slot { }; /* for KVM_GET/SET_VCPU_EVENTS */ struct kvm_vcpu_events { struct { __u8 serror_pending; __u8 serror_has_esr; /* Align it to 8 bytes */ __u8 pad[6]; __u64 serror_esr; } exception; __u32 reserved[12]; }; /* If you need to interpret the index values, here is the key: */ #define KVM_REG_ARM_COPROC_MASK 0x000000000FFF0000 #define KVM_REG_ARM_COPROC_SHIFT 16 Loading tools/arch/arm64/include/uapi/asm/kvm.h +13 −0 Original line number Diff line number Diff line Loading @@ -39,6 +39,7 @@ #define __KVM_HAVE_GUEST_DEBUG #define __KVM_HAVE_IRQ_LINE #define __KVM_HAVE_READONLY_MEM #define __KVM_HAVE_VCPU_EVENTS #define KVM_COALESCED_MMIO_PAGE_OFFSET 1 Loading Loading @@ -154,6 +155,18 @@ struct kvm_sync_regs { struct kvm_arch_memory_slot { }; /* for KVM_GET/SET_VCPU_EVENTS */ struct kvm_vcpu_events { struct { __u8 serror_pending; __u8 serror_has_esr; /* Align it to 8 bytes */ __u8 pad[6]; __u64 serror_esr; } exception; __u32 reserved[12]; }; /* If you need to interpret the index values, here is the key: */ #define KVM_REG_ARM_COPROC_MASK 0x000000000FFF0000 #define KVM_REG_ARM_COPROC_SHIFT 16 Loading Loading
arch/x86/events/intel/lbr.c +4 −0 Original line number Diff line number Diff line Loading @@ -1272,4 +1272,8 @@ void intel_pmu_lbr_init_knl(void) x86_pmu.lbr_sel_mask = LBR_SEL_MASK; x86_pmu.lbr_sel_map = snb_lbr_sel_map; /* Knights Landing does have MISPREDICT bit */ if (x86_pmu.intel_cap.lbr_format == LBR_FORMAT_LIP) x86_pmu.intel_cap.lbr_format = LBR_FORMAT_EIP_FLAGS; }
include/uapi/linux/perf_event.h +1 −1 Original line number Diff line number Diff line Loading @@ -144,7 +144,7 @@ enum perf_event_sample_format { PERF_SAMPLE_MAX = 1U << 20, /* non-ABI */ __PERF_SAMPLE_CALLCHAIN_EARLY = 1ULL << 63, __PERF_SAMPLE_CALLCHAIN_EARLY = 1ULL << 63, /* non-ABI; internal use */ }; /* Loading
kernel/events/core.c +4 −0 Original line number Diff line number Diff line Loading @@ -5943,6 +5943,7 @@ perf_output_sample_ustack(struct perf_output_handle *handle, u64 dump_size, unsigned long sp; unsigned int rem; u64 dyn_size; mm_segment_t fs; /* * We dump: Loading @@ -5960,7 +5961,10 @@ perf_output_sample_ustack(struct perf_output_handle *handle, u64 dump_size, /* Data. */ sp = perf_user_stack_pointer(regs); fs = get_fs(); set_fs(USER_DS); rem = __output_copy_user(handle, (void *) sp, dump_size); set_fs(fs); dyn_size = dump_size - rem; perf_output_skip(handle, rem); Loading
tools/arch/arm/include/uapi/asm/kvm.h +13 −0 Original line number Diff line number Diff line Loading @@ -27,6 +27,7 @@ #define __KVM_HAVE_GUEST_DEBUG #define __KVM_HAVE_IRQ_LINE #define __KVM_HAVE_READONLY_MEM #define __KVM_HAVE_VCPU_EVENTS #define KVM_COALESCED_MMIO_PAGE_OFFSET 1 Loading Loading @@ -125,6 +126,18 @@ struct kvm_sync_regs { struct kvm_arch_memory_slot { }; /* for KVM_GET/SET_VCPU_EVENTS */ struct kvm_vcpu_events { struct { __u8 serror_pending; __u8 serror_has_esr; /* Align it to 8 bytes */ __u8 pad[6]; __u64 serror_esr; } exception; __u32 reserved[12]; }; /* If you need to interpret the index values, here is the key: */ #define KVM_REG_ARM_COPROC_MASK 0x000000000FFF0000 #define KVM_REG_ARM_COPROC_SHIFT 16 Loading
tools/arch/arm64/include/uapi/asm/kvm.h +13 −0 Original line number Diff line number Diff line Loading @@ -39,6 +39,7 @@ #define __KVM_HAVE_GUEST_DEBUG #define __KVM_HAVE_IRQ_LINE #define __KVM_HAVE_READONLY_MEM #define __KVM_HAVE_VCPU_EVENTS #define KVM_COALESCED_MMIO_PAGE_OFFSET 1 Loading Loading @@ -154,6 +155,18 @@ struct kvm_sync_regs { struct kvm_arch_memory_slot { }; /* for KVM_GET/SET_VCPU_EVENTS */ struct kvm_vcpu_events { struct { __u8 serror_pending; __u8 serror_has_esr; /* Align it to 8 bytes */ __u8 pad[6]; __u64 serror_esr; } exception; __u32 reserved[12]; }; /* If you need to interpret the index values, here is the key: */ #define KVM_REG_ARM_COPROC_MASK 0x000000000FFF0000 #define KVM_REG_ARM_COPROC_SHIFT 16 Loading