Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 7ed72aef authored by Manikandan Mohan's avatar Manikandan Mohan
Browse files

cnss2: Add support for bus bandwidth scale 



Register MHI bus bandwidth scale callback function.

Change-Id: I0829db892545565c1d59898a988ed9f0da5d1470
Signed-off-by: default avatarManikandan Mohan <manikand@codeaurora.org>
parent e1bdeb41

drivers/net/wireless/cnss2/pci.c

+24 −0
Original line number Diff line number Diff line
@@ -1116,16 +1116,20 @@ static int cnss_pci_set_mhi_state(struct cnss_pci_data *pci_priv, 
		ret = 0;

		break;

	case CNSS_MHI_SUSPEND:

		mutex_lock(&pci_priv->mhi_ctrl->pm_mutex);

		if (pci_priv->drv_connected_last)

			ret = mhi_pm_fast_suspend(pci_priv->mhi_ctrl, true);

		else

			ret = mhi_pm_suspend(pci_priv->mhi_ctrl);

		mutex_unlock(&pci_priv->mhi_ctrl->pm_mutex);

		break;

	case CNSS_MHI_RESUME:

		mutex_lock(&pci_priv->mhi_ctrl->pm_mutex);

		if (pci_priv->drv_connected_last)

			ret = mhi_pm_fast_resume(pci_priv->mhi_ctrl, true);

		else

			ret = mhi_pm_resume(pci_priv->mhi_ctrl);

		mutex_unlock(&pci_priv->mhi_ctrl->pm_mutex);

		break;

	case CNSS_MHI_TRIGGER_RDDM:

		ret = mhi_force_rddm_mode(pci_priv->mhi_ctrl);
@@ -4265,6 +4269,25 @@ static int cnss_pci_update_fw_name(struct cnss_pci_data *pci_priv) 
	return 0;

}



static int cnss_mhi_bw_scale(struct mhi_controller *mhi_ctrl,

			     struct mhi_link_info *link_info)

{

	struct cnss_pci_data *pci_priv = mhi_ctrl->priv_data;

	int ret = 0;



	ret = msm_pcie_set_link_bandwidth(pci_priv->pci_dev,

					  link_info->target_link_speed,

					  link_info->target_link_width);



	if (ret)

		return ret;



	cnss_pr_dbg("Setting link speed:0x%x, width:0x%x\n",

		    link_info->target_link_speed,

		    link_info->target_link_width);

	return 0;

}



static int cnss_pci_register_mhi(struct cnss_pci_data *pci_priv)

{

	int ret = 0;
@@ -4313,6 +4336,7 @@ static int cnss_pci_register_mhi(struct cnss_pci_data *pci_priv) 
	mhi_ctrl->status_cb = cnss_mhi_notify_status;

	mhi_ctrl->runtime_get = cnss_mhi_pm_runtime_get;

	mhi_ctrl->runtime_put = cnss_mhi_pm_runtime_put_noidle;

	mhi_ctrl->bw_scale = cnss_mhi_bw_scale;



	mhi_ctrl->rddm_size = pci_priv->plat_priv->ramdump_info_v2.ramdump_size;

	mhi_ctrl->sbl_size = SZ_512K;