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Commit 7ec32e49 authored by Manuel Lauss's avatar Manuel Lauss Committed by Ralf Baechle
Browse files

MIPS: Alchemy: Update cpu-feature-overrides 



More features the Au1 core definitely doesn't have.

Signed-off-by: default avatarManuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/7562/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 092ea466

arch/mips/include/asm/mach-au1x00/cpu-feature-overrides.h

+12 −0
Original line number Diff line number Diff line
@@ -8,6 +8,12 @@ 
#define __ASM_MACH_AU1X00_CPU_FEATURE_OVERRIDES_H



#define cpu_has_tlb			1

#define cpu_has_tlbinv			0

#define cpu_has_segments		0

#define cpu_has_eva			0

#define cpu_has_htw			0

#define cpu_has_rixiex			0

#define cpu_has_maar			0

#define cpu_has_4kex			1

#define cpu_has_3k_cache		0

#define cpu_has_4k_cache		1
@@ -28,6 +34,8 @@ 
#define cpu_has_mdmx			0

#define cpu_has_mips3d			0

#define cpu_has_smartmips		0

#define cpu_has_rixi			0

#define cpu_has_mmips			0

#define cpu_has_vtag_icache		0

#define cpu_has_dc_aliases		0

#define cpu_has_ic_fills_f_dc		1
@@ -50,4 +58,8 @@ 
#define cpu_dcache_line_size()		32

#define cpu_icache_line_size()		32



#define cpu_has_perf_cntr_intr_bit	0

#define cpu_has_vz			0

#define cpu_has_msa			0



#endif /* __ASM_MACH_AU1X00_CPU_FEATURE_OVERRIDES_H */