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Commit 7e435ad2 authored by Ville Syrjälä's avatar Ville Syrjälä Committed by Daniel Vetter
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drm/i915: Add LO/HI PRIVATE_PAT registers

parent ab9cc558
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+4 −4
Original line number Diff line number Diff line
@@ -2889,8 +2889,8 @@ static void bdw_setup_private_ppat(struct drm_i915_private *dev_priv)

	/* XXX: spec defines this as 2 distinct registers. It's unclear if a 64b
	 * write would work. */
	I915_WRITE(GEN8_PRIVATE_PAT, pat);
	I915_WRITE(GEN8_PRIVATE_PAT + 4, pat >> 32);
	I915_WRITE(GEN8_PRIVATE_PAT_LO, pat);
	I915_WRITE(GEN8_PRIVATE_PAT_HI, pat >> 32);
}

static void chv_setup_private_ppat(struct drm_i915_private *dev_priv)
@@ -2924,8 +2924,8 @@ static void chv_setup_private_ppat(struct drm_i915_private *dev_priv)
	      GEN8_PPAT(6, CHV_PPAT_SNOOP) |
	      GEN8_PPAT(7, CHV_PPAT_SNOOP);

	I915_WRITE(GEN8_PRIVATE_PAT, pat);
	I915_WRITE(GEN8_PRIVATE_PAT + 4, pat >> 32);
	I915_WRITE(GEN8_PRIVATE_PAT_LO, pat);
	I915_WRITE(GEN8_PRIVATE_PAT_HI, pat >> 32);
}

static int gen8_gmch_probe(struct drm_device *dev,
+2 −1
Original line number Diff line number Diff line
@@ -1551,7 +1551,8 @@ enum skl_disp_power_wells {
#define   RING_FAULT_FAULT_TYPE(x) ((x >> 1) & 0x3)
#define   RING_FAULT_VALID	(1<<0)
#define DONE_REG		0x40b0
#define GEN8_PRIVATE_PAT	0x40e0
#define GEN8_PRIVATE_PAT_LO	0x40e0
#define GEN8_PRIVATE_PAT_HI	(0x40e0 + 4)
#define BSD_HWS_PGA_GEN7	(0x04180)
#define BLT_HWS_PGA_GEN7	(0x04280)
#define VEBOX_HWS_PGA_GEN7	(0x04380)