Loading arch/x86/kernel/cpu/intel.c +1 −2 Original line number Original line Diff line number Diff line Loading @@ -324,12 +324,11 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c) set_cpu_cap(c, X86_FEATURE_P4); set_cpu_cap(c, X86_FEATURE_P4); if (c->x86 == 6) if (c->x86 == 6) set_cpu_cap(c, X86_FEATURE_P3); set_cpu_cap(c, X86_FEATURE_P3); #endif if (cpu_has_bts) if (cpu_has_bts) ptrace_bts_init_intel(c); ptrace_bts_init_intel(c); #endif if (!cpu_has(c, X86_FEATURE_XTOPOLOGY)) { if (!cpu_has(c, X86_FEATURE_XTOPOLOGY)) { /* /* * let's use the legacy cpuid vector 0x1 and 0x4 for topology * let's use the legacy cpuid vector 0x1 and 0x4 for topology Loading arch/x86/kernel/ds.c +4 −5 Original line number Original line Diff line number Diff line Loading @@ -847,17 +847,16 @@ void __cpuinit ds_init_intel(struct cpuinfo_x86 *c) switch (c->x86) { switch (c->x86) { case 0x6: case 0x6: switch (c->x86_model) { switch (c->x86_model) { case 0 ... 0xC: /* sorry, don't know about them */ break; case 0xD: case 0xD: case 0xE: /* Pentium M */ case 0xE: /* Pentium M */ ds_configure(&ds_cfg_var); ds_configure(&ds_cfg_var); break; break; case 0xF: /* Core2 */ default: /* Core2, Atom, ... */ case 0x1C: /* Atom */ ds_configure(&ds_cfg_64); ds_configure(&ds_cfg_64); break; break; default: /* sorry, don't know about them */ break; } } break; break; case 0xF: case 0xF: Loading arch/x86/kernel/ptrace.c +4 −5 Original line number Original line Diff line number Diff line Loading @@ -929,17 +929,16 @@ void __cpuinit ptrace_bts_init_intel(struct cpuinfo_x86 *c) switch (c->x86) { switch (c->x86) { case 0x6: case 0x6: switch (c->x86_model) { switch (c->x86_model) { case 0 ... 0xC: /* sorry, don't know about them */ break; case 0xD: case 0xD: case 0xE: /* Pentium M */ case 0xE: /* Pentium M */ bts_configure(&bts_cfg_pentium_m); bts_configure(&bts_cfg_pentium_m); break; break; case 0xF: /* Core2 */ default: /* Core2, Atom, ... */ case 0x1C: /* Atom */ bts_configure(&bts_cfg_core2); bts_configure(&bts_cfg_core2); break; break; default: /* sorry, don't know about them */ break; } } break; break; case 0xF: case 0xF: Loading Loading
arch/x86/kernel/cpu/intel.c +1 −2 Original line number Original line Diff line number Diff line Loading @@ -324,12 +324,11 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c) set_cpu_cap(c, X86_FEATURE_P4); set_cpu_cap(c, X86_FEATURE_P4); if (c->x86 == 6) if (c->x86 == 6) set_cpu_cap(c, X86_FEATURE_P3); set_cpu_cap(c, X86_FEATURE_P3); #endif if (cpu_has_bts) if (cpu_has_bts) ptrace_bts_init_intel(c); ptrace_bts_init_intel(c); #endif if (!cpu_has(c, X86_FEATURE_XTOPOLOGY)) { if (!cpu_has(c, X86_FEATURE_XTOPOLOGY)) { /* /* * let's use the legacy cpuid vector 0x1 and 0x4 for topology * let's use the legacy cpuid vector 0x1 and 0x4 for topology Loading
arch/x86/kernel/ds.c +4 −5 Original line number Original line Diff line number Diff line Loading @@ -847,17 +847,16 @@ void __cpuinit ds_init_intel(struct cpuinfo_x86 *c) switch (c->x86) { switch (c->x86) { case 0x6: case 0x6: switch (c->x86_model) { switch (c->x86_model) { case 0 ... 0xC: /* sorry, don't know about them */ break; case 0xD: case 0xD: case 0xE: /* Pentium M */ case 0xE: /* Pentium M */ ds_configure(&ds_cfg_var); ds_configure(&ds_cfg_var); break; break; case 0xF: /* Core2 */ default: /* Core2, Atom, ... */ case 0x1C: /* Atom */ ds_configure(&ds_cfg_64); ds_configure(&ds_cfg_64); break; break; default: /* sorry, don't know about them */ break; } } break; break; case 0xF: case 0xF: Loading
arch/x86/kernel/ptrace.c +4 −5 Original line number Original line Diff line number Diff line Loading @@ -929,17 +929,16 @@ void __cpuinit ptrace_bts_init_intel(struct cpuinfo_x86 *c) switch (c->x86) { switch (c->x86) { case 0x6: case 0x6: switch (c->x86_model) { switch (c->x86_model) { case 0 ... 0xC: /* sorry, don't know about them */ break; case 0xD: case 0xD: case 0xE: /* Pentium M */ case 0xE: /* Pentium M */ bts_configure(&bts_cfg_pentium_m); bts_configure(&bts_cfg_pentium_m); break; break; case 0xF: /* Core2 */ default: /* Core2, Atom, ... */ case 0x1C: /* Atom */ bts_configure(&bts_cfg_core2); bts_configure(&bts_cfg_core2); break; break; default: /* sorry, don't know about them */ break; } } break; break; case 0xF: case 0xF: Loading