Loading drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe17x/cam_vfe680.h 0 → 100644 +1306 −0 File added.Preview size limit exceeded, changes collapsed. Show changes drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe17x/cam_vfe_lite68x.h 0 → 100644 +235 −0 Original line number Diff line number Diff line /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved. */ #ifndef _CAM_VFE_LITE680X_H_ #define _CAM_VFE_LITE680X_H_ #include "cam_vfe_camif_ver3.h" #include "cam_vfe_top_ver3.h" #include "cam_vfe_core.h" #include "cam_vfe_bus_ver3.h" #include "cam_irq_controller.h" static struct cam_irq_register_set vfe680x_bus_irq_reg[2] = { { .mask_reg_offset = 0x00000218, .clear_reg_offset = 0x00000220, .status_reg_offset = 0x00000228, }, { .mask_reg_offset = 0x0000021C, .clear_reg_offset = 0x00000224, .status_reg_offset = 0x0000022C, }, }; static struct cam_vfe_bus_ver3_hw_info vfe680x_bus_hw_info = { .common_reg = { .hw_version = 0x00000200, .cgc_ovd = 0x00000208, .if_frameheader_cfg = { 0x00000234, 0x00000238, 0x0000023C, 0x00000240, 0x00000244, 0x00000248, }, .pwr_iso_cfg = 0x0000025C, .overflow_status_clear = 0x00000260, .ccif_violation_status = 0x00000264, .overflow_status = 0x00000268, .image_size_violation_status = 0x00000270, .debug_status_top_cfg = 0x000002D4, .debug_status_top = 0x000002D8, .test_bus_ctrl = 0x000002DC, .irq_reg_info = { .num_registers = 2, .irq_reg_set = vfe680x_bus_irq_reg, .global_clear_offset = 0x00000230, .global_clear_bitmask = 0x00000001, }, }, .num_client = 4, .bus_client_reg = { /* BUS Client 0 RDI0 */ { .cfg = 0x00000400, .image_addr = 0x00000404, .frame_incr = 0x00000408, .image_cfg_0 = 0x0000040C, .image_cfg_1 = 0x00000410, .image_cfg_2 = 0x00000414, .packer_cfg = 0x00000418, .frame_header_addr = 0x00000420, .frame_header_incr = 0x00000424, .frame_header_cfg = 0x00000428, .irq_subsample_period = 0x00000430, .irq_subsample_pattern = 0x00000434, .framedrop_period = 0x00000438, .framedrop_pattern = 0x0000043C, .mmu_prefetch_cfg = 0x00000460, .mmu_prefetch_max_offset = 0x00000464, .system_cache_cfg = 0x00000468, .addr_status_0 = 0x00000470, .addr_status_1 = 0x00000474, .addr_status_2 = 0x00000478, .addr_status_3 = 0x0000047C, .debug_status_cfg = 0x00000480, .debug_status_0 = 0x00000484, .debug_status_1 = 0x00000488, .comp_group = CAM_VFE_BUS_VER3_COMP_GRP_0, .ubwc_regs = NULL, }, /* BUS Client 1 RDI1 */ { .cfg = 0x00000500, .image_addr = 0x00000504, .frame_incr = 0x00000508, .image_cfg_0 = 0x0000050C, .image_cfg_1 = 0x00000510, .image_cfg_2 = 0x00000514, .packer_cfg = 0x00000518, .frame_header_addr = 0x00000520, .frame_header_incr = 0x00000524, .frame_header_cfg = 0x00000528, .irq_subsample_period = 0x00000530, .irq_subsample_pattern = 0x00000534, .framedrop_period = 0x00000538, .framedrop_pattern = 0x0000053C, .mmu_prefetch_cfg = 0x00000560, .mmu_prefetch_max_offset = 0x00000564, .system_cache_cfg = 0x00000568, .addr_status_0 = 0x00000570, .addr_status_1 = 0x00000574, .addr_status_2 = 0x00000578, .addr_status_3 = 0x0000057C, .debug_status_cfg = 0x00000580, .debug_status_0 = 0x00000584, .debug_status_1 = 0x00000588, .comp_group = CAM_VFE_BUS_VER3_COMP_GRP_1, .ubwc_regs = NULL, }, /* BUS Client 2 RDI2 */ { .cfg = 0x00000600, .image_addr = 0x00000604, .frame_incr = 0x00000608, .image_cfg_0 = 0x0000060C, .image_cfg_1 = 0x00000610, .image_cfg_2 = 0x00000614, .packer_cfg = 0x00000618, .frame_header_addr = 0x00000620, .frame_header_incr = 0x00000624, .frame_header_cfg = 0x00000628, .irq_subsample_period = 0x00000630, .irq_subsample_pattern = 0x00000634, .framedrop_period = 0x00000638, .framedrop_pattern = 0x0000063C, .mmu_prefetch_cfg = 0x00000660, .mmu_prefetch_max_offset = 0x00000664, .system_cache_cfg = 0x00000668, .addr_status_0 = 0x00000670, .addr_status_1 = 0x00000674, .addr_status_2 = 0x00000678, .addr_status_3 = 0x0000067C, .debug_status_cfg = 0x00000680, .debug_status_0 = 0x00000684, .debug_status_1 = 0x00000688, .comp_group = CAM_VFE_BUS_VER3_COMP_GRP_2, .ubwc_regs = NULL, }, /* BUS Client 3 RDI3 */ { .cfg = 0x00000700, .image_addr = 0x00000704, .frame_incr = 0x00000708, .image_cfg_0 = 0x0000070C, .image_cfg_1 = 0x00000710, .image_cfg_2 = 0x00000714, .packer_cfg = 0x00000718, .frame_header_addr = 0x00000720, .frame_header_incr = 0x00000724, .frame_header_cfg = 0x00000728, .irq_subsample_period = 0x00000730, .irq_subsample_pattern = 0x00000734, .framedrop_period = 0x00000738, .framedrop_pattern = 0x0000073C, .mmu_prefetch_cfg = 0x00000760, .mmu_prefetch_max_offset = 0x00000764, .system_cache_cfg = 0x00000768, .addr_status_0 = 0x00000770, .addr_status_1 = 0x00000774, .addr_status_2 = 0x00000778, .addr_status_3 = 0x0000077C, .debug_status_cfg = 0x00000780, .debug_status_0 = 0x00000784, .debug_status_1 = 0x00000788, .comp_group = CAM_VFE_BUS_VER3_COMP_GRP_3, .ubwc_regs = NULL, }, }, .num_out = 4, .vfe_out_hw_info = { { .vfe_out_type = CAM_VFE_BUS_VER3_VFE_OUT_RDI0, .max_width = -1, .max_height = -1, .source_group = CAM_VFE_BUS_VER3_SRC_GRP_0, .num_wm = 1, .wm_idx = { 0, }, }, { .vfe_out_type = CAM_VFE_BUS_VER3_VFE_OUT_RDI1, .max_width = -1, .max_height = -1, .source_group = CAM_VFE_BUS_VER3_SRC_GRP_1, .num_wm = 1, .wm_idx = { 1, }, }, { .vfe_out_type = CAM_VFE_BUS_VER3_VFE_OUT_RDI2, .max_width = -1, .max_height = -1, .source_group = CAM_VFE_BUS_VER3_SRC_GRP_2, .num_wm = 1, .wm_idx = { 2, }, }, { .vfe_out_type = CAM_VFE_BUS_VER3_VFE_OUT_RDI3, .max_width = -1, .max_height = -1, .source_group = CAM_VFE_BUS_VER3_SRC_GRP_3, .num_wm = 1, .wm_idx = { 3, }, }, }, .comp_done_shift = 6, .top_irq_shift = 1, .max_out_res = CAM_ISP_IFE_OUT_RES_BASE + 33, }; static struct cam_vfe_hw_info cam_vfe_lite68x_hw_info = { .irq_reg_info =, .bus_version = CAM_VFE_BUS_VER_3_0, .bus_hw_info = &vfe680x_bus_hw_info, .bus_rd_version = NULL, .bus_rd_hw_info = NULL, .top_version =, .top_hw_info =, }; #endif /* _CAM_VFE_LITE680X_H_ */ drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_bus/cam_vfe_bus_ver3.h +14 −2 Original line number Diff line number Diff line Loading @@ -13,6 +13,8 @@ #define CAM_VFE_BUS_VER3_MAX_CLIENTS 26 #define CAM_VFE_BUS_VER3_MAX_SUB_GRPS 6 #define CAM_VFE_BUS_VER3_MAX_MID_PER_PORT 4 #define CAM_VFE_BUS_VER3_480_MAX_CLIENTS 26 #define CAM_VFE_BUS_VER3_680_MAX_CLIENTS 28 enum cam_vfe_bus_ver3_vfe_core_id { CAM_VFE_BUS_VER3_VFE_CORE_0, Loading Loading @@ -45,6 +47,9 @@ enum cam_vfe_bus_ver3_comp_grp_type { CAM_VFE_BUS_VER3_COMP_GRP_11, CAM_VFE_BUS_VER3_COMP_GRP_12, CAM_VFE_BUS_VER3_COMP_GRP_13, CAM_VFE_BUS_VER3_COMP_GRP_14, CAM_VFE_BUS_VER3_COMP_GRP_15, CAM_VFE_BUS_VER3_COMP_GRP_16, CAM_VFE_BUS_VER3_COMP_GRP_MAX, }; Loading Loading @@ -73,6 +78,9 @@ enum cam_vfe_bus_ver3_vfe_out_type { CAM_VFE_BUS_VER3_VFE_OUT_DS16_DISP, CAM_VFE_BUS_VER3_VFE_OUT_2PD, CAM_VFE_BUS_VER3_VFE_OUT_LCR, CAM_VFE_BUS_VER3_VFE_OUT_AWB_BFW, CAM_VFE_BUS_VER3_VFE_OUT_2PD_STATS, CAM_VFE_BUS_VER3_VFE_OUT_LTM_STATS, CAM_VFE_BUS_VER3_VFE_OUT_MAX, }; Loading Loading @@ -138,6 +146,8 @@ struct cam_vfe_bus_ver3_reg_offset_bus_client { uint32_t irq_subsample_pattern; uint32_t framedrop_period; uint32_t framedrop_pattern; uint32_t mmu_prefetch_cfg; uint32_t mmu_prefetch_max_offset; uint32_t burst_limit; uint32_t system_cache_cfg; void *ubwc_regs; Loading @@ -162,6 +172,8 @@ struct cam_vfe_bus_ver3_vfe_out_hw_info { uint32_t max_height; uint32_t source_group; uint32_t mid[CAM_VFE_BUS_VER3_MAX_MID_PER_PORT]; uint32_t num_wm; uint32_t wm_idx[PLANE_MAX]; }; /* Loading @@ -182,7 +194,7 @@ struct cam_vfe_bus_ver3_hw_info { struct cam_vfe_bus_ver3_reg_offset_common common_reg; uint32_t num_client; struct cam_vfe_bus_ver3_reg_offset_bus_client bus_client_reg[CAM_VFE_BUS_VER3_MAX_CLIENTS]; bus_client_reg[CAM_VFE_BUS_VER3_680_MAX_CLIENTS]; uint32_t num_out; struct cam_vfe_bus_ver3_vfe_out_hw_info vfe_out_hw_info[CAM_VFE_BUS_VER3_VFE_OUT_MAX]; Loading drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_top/include/cam_vfe_top.h +2 −1 Original line number Diff line number Diff line /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved. * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved. */ #ifndef _CAM_VFE_TOP_H_ Loading @@ -12,6 +12,7 @@ #define CAM_VFE_TOP_VER_1_0 0x100000 #define CAM_VFE_TOP_VER_2_0 0x200000 #define CAM_VFE_TOP_VER_3_0 0x300000 #define CAM_VFE_TOP_VER_4_0 0x400000 #define CAM_VFE_CAMIF_VER_1_0 0x10 #define CAM_VFE_CAMIF_VER_2_0 0x20 Loading Loading
drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe17x/cam_vfe680.h 0 → 100644 +1306 −0 File added.Preview size limit exceeded, changes collapsed. Show changes
drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe17x/cam_vfe_lite68x.h 0 → 100644 +235 −0 Original line number Diff line number Diff line /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved. */ #ifndef _CAM_VFE_LITE680X_H_ #define _CAM_VFE_LITE680X_H_ #include "cam_vfe_camif_ver3.h" #include "cam_vfe_top_ver3.h" #include "cam_vfe_core.h" #include "cam_vfe_bus_ver3.h" #include "cam_irq_controller.h" static struct cam_irq_register_set vfe680x_bus_irq_reg[2] = { { .mask_reg_offset = 0x00000218, .clear_reg_offset = 0x00000220, .status_reg_offset = 0x00000228, }, { .mask_reg_offset = 0x0000021C, .clear_reg_offset = 0x00000224, .status_reg_offset = 0x0000022C, }, }; static struct cam_vfe_bus_ver3_hw_info vfe680x_bus_hw_info = { .common_reg = { .hw_version = 0x00000200, .cgc_ovd = 0x00000208, .if_frameheader_cfg = { 0x00000234, 0x00000238, 0x0000023C, 0x00000240, 0x00000244, 0x00000248, }, .pwr_iso_cfg = 0x0000025C, .overflow_status_clear = 0x00000260, .ccif_violation_status = 0x00000264, .overflow_status = 0x00000268, .image_size_violation_status = 0x00000270, .debug_status_top_cfg = 0x000002D4, .debug_status_top = 0x000002D8, .test_bus_ctrl = 0x000002DC, .irq_reg_info = { .num_registers = 2, .irq_reg_set = vfe680x_bus_irq_reg, .global_clear_offset = 0x00000230, .global_clear_bitmask = 0x00000001, }, }, .num_client = 4, .bus_client_reg = { /* BUS Client 0 RDI0 */ { .cfg = 0x00000400, .image_addr = 0x00000404, .frame_incr = 0x00000408, .image_cfg_0 = 0x0000040C, .image_cfg_1 = 0x00000410, .image_cfg_2 = 0x00000414, .packer_cfg = 0x00000418, .frame_header_addr = 0x00000420, .frame_header_incr = 0x00000424, .frame_header_cfg = 0x00000428, .irq_subsample_period = 0x00000430, .irq_subsample_pattern = 0x00000434, .framedrop_period = 0x00000438, .framedrop_pattern = 0x0000043C, .mmu_prefetch_cfg = 0x00000460, .mmu_prefetch_max_offset = 0x00000464, .system_cache_cfg = 0x00000468, .addr_status_0 = 0x00000470, .addr_status_1 = 0x00000474, .addr_status_2 = 0x00000478, .addr_status_3 = 0x0000047C, .debug_status_cfg = 0x00000480, .debug_status_0 = 0x00000484, .debug_status_1 = 0x00000488, .comp_group = CAM_VFE_BUS_VER3_COMP_GRP_0, .ubwc_regs = NULL, }, /* BUS Client 1 RDI1 */ { .cfg = 0x00000500, .image_addr = 0x00000504, .frame_incr = 0x00000508, .image_cfg_0 = 0x0000050C, .image_cfg_1 = 0x00000510, .image_cfg_2 = 0x00000514, .packer_cfg = 0x00000518, .frame_header_addr = 0x00000520, .frame_header_incr = 0x00000524, .frame_header_cfg = 0x00000528, .irq_subsample_period = 0x00000530, .irq_subsample_pattern = 0x00000534, .framedrop_period = 0x00000538, .framedrop_pattern = 0x0000053C, .mmu_prefetch_cfg = 0x00000560, .mmu_prefetch_max_offset = 0x00000564, .system_cache_cfg = 0x00000568, .addr_status_0 = 0x00000570, .addr_status_1 = 0x00000574, .addr_status_2 = 0x00000578, .addr_status_3 = 0x0000057C, .debug_status_cfg = 0x00000580, .debug_status_0 = 0x00000584, .debug_status_1 = 0x00000588, .comp_group = CAM_VFE_BUS_VER3_COMP_GRP_1, .ubwc_regs = NULL, }, /* BUS Client 2 RDI2 */ { .cfg = 0x00000600, .image_addr = 0x00000604, .frame_incr = 0x00000608, .image_cfg_0 = 0x0000060C, .image_cfg_1 = 0x00000610, .image_cfg_2 = 0x00000614, .packer_cfg = 0x00000618, .frame_header_addr = 0x00000620, .frame_header_incr = 0x00000624, .frame_header_cfg = 0x00000628, .irq_subsample_period = 0x00000630, .irq_subsample_pattern = 0x00000634, .framedrop_period = 0x00000638, .framedrop_pattern = 0x0000063C, .mmu_prefetch_cfg = 0x00000660, .mmu_prefetch_max_offset = 0x00000664, .system_cache_cfg = 0x00000668, .addr_status_0 = 0x00000670, .addr_status_1 = 0x00000674, .addr_status_2 = 0x00000678, .addr_status_3 = 0x0000067C, .debug_status_cfg = 0x00000680, .debug_status_0 = 0x00000684, .debug_status_1 = 0x00000688, .comp_group = CAM_VFE_BUS_VER3_COMP_GRP_2, .ubwc_regs = NULL, }, /* BUS Client 3 RDI3 */ { .cfg = 0x00000700, .image_addr = 0x00000704, .frame_incr = 0x00000708, .image_cfg_0 = 0x0000070C, .image_cfg_1 = 0x00000710, .image_cfg_2 = 0x00000714, .packer_cfg = 0x00000718, .frame_header_addr = 0x00000720, .frame_header_incr = 0x00000724, .frame_header_cfg = 0x00000728, .irq_subsample_period = 0x00000730, .irq_subsample_pattern = 0x00000734, .framedrop_period = 0x00000738, .framedrop_pattern = 0x0000073C, .mmu_prefetch_cfg = 0x00000760, .mmu_prefetch_max_offset = 0x00000764, .system_cache_cfg = 0x00000768, .addr_status_0 = 0x00000770, .addr_status_1 = 0x00000774, .addr_status_2 = 0x00000778, .addr_status_3 = 0x0000077C, .debug_status_cfg = 0x00000780, .debug_status_0 = 0x00000784, .debug_status_1 = 0x00000788, .comp_group = CAM_VFE_BUS_VER3_COMP_GRP_3, .ubwc_regs = NULL, }, }, .num_out = 4, .vfe_out_hw_info = { { .vfe_out_type = CAM_VFE_BUS_VER3_VFE_OUT_RDI0, .max_width = -1, .max_height = -1, .source_group = CAM_VFE_BUS_VER3_SRC_GRP_0, .num_wm = 1, .wm_idx = { 0, }, }, { .vfe_out_type = CAM_VFE_BUS_VER3_VFE_OUT_RDI1, .max_width = -1, .max_height = -1, .source_group = CAM_VFE_BUS_VER3_SRC_GRP_1, .num_wm = 1, .wm_idx = { 1, }, }, { .vfe_out_type = CAM_VFE_BUS_VER3_VFE_OUT_RDI2, .max_width = -1, .max_height = -1, .source_group = CAM_VFE_BUS_VER3_SRC_GRP_2, .num_wm = 1, .wm_idx = { 2, }, }, { .vfe_out_type = CAM_VFE_BUS_VER3_VFE_OUT_RDI3, .max_width = -1, .max_height = -1, .source_group = CAM_VFE_BUS_VER3_SRC_GRP_3, .num_wm = 1, .wm_idx = { 3, }, }, }, .comp_done_shift = 6, .top_irq_shift = 1, .max_out_res = CAM_ISP_IFE_OUT_RES_BASE + 33, }; static struct cam_vfe_hw_info cam_vfe_lite68x_hw_info = { .irq_reg_info =, .bus_version = CAM_VFE_BUS_VER_3_0, .bus_hw_info = &vfe680x_bus_hw_info, .bus_rd_version = NULL, .bus_rd_hw_info = NULL, .top_version =, .top_hw_info =, }; #endif /* _CAM_VFE_LITE680X_H_ */
drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_bus/cam_vfe_bus_ver3.h +14 −2 Original line number Diff line number Diff line Loading @@ -13,6 +13,8 @@ #define CAM_VFE_BUS_VER3_MAX_CLIENTS 26 #define CAM_VFE_BUS_VER3_MAX_SUB_GRPS 6 #define CAM_VFE_BUS_VER3_MAX_MID_PER_PORT 4 #define CAM_VFE_BUS_VER3_480_MAX_CLIENTS 26 #define CAM_VFE_BUS_VER3_680_MAX_CLIENTS 28 enum cam_vfe_bus_ver3_vfe_core_id { CAM_VFE_BUS_VER3_VFE_CORE_0, Loading Loading @@ -45,6 +47,9 @@ enum cam_vfe_bus_ver3_comp_grp_type { CAM_VFE_BUS_VER3_COMP_GRP_11, CAM_VFE_BUS_VER3_COMP_GRP_12, CAM_VFE_BUS_VER3_COMP_GRP_13, CAM_VFE_BUS_VER3_COMP_GRP_14, CAM_VFE_BUS_VER3_COMP_GRP_15, CAM_VFE_BUS_VER3_COMP_GRP_16, CAM_VFE_BUS_VER3_COMP_GRP_MAX, }; Loading Loading @@ -73,6 +78,9 @@ enum cam_vfe_bus_ver3_vfe_out_type { CAM_VFE_BUS_VER3_VFE_OUT_DS16_DISP, CAM_VFE_BUS_VER3_VFE_OUT_2PD, CAM_VFE_BUS_VER3_VFE_OUT_LCR, CAM_VFE_BUS_VER3_VFE_OUT_AWB_BFW, CAM_VFE_BUS_VER3_VFE_OUT_2PD_STATS, CAM_VFE_BUS_VER3_VFE_OUT_LTM_STATS, CAM_VFE_BUS_VER3_VFE_OUT_MAX, }; Loading Loading @@ -138,6 +146,8 @@ struct cam_vfe_bus_ver3_reg_offset_bus_client { uint32_t irq_subsample_pattern; uint32_t framedrop_period; uint32_t framedrop_pattern; uint32_t mmu_prefetch_cfg; uint32_t mmu_prefetch_max_offset; uint32_t burst_limit; uint32_t system_cache_cfg; void *ubwc_regs; Loading @@ -162,6 +172,8 @@ struct cam_vfe_bus_ver3_vfe_out_hw_info { uint32_t max_height; uint32_t source_group; uint32_t mid[CAM_VFE_BUS_VER3_MAX_MID_PER_PORT]; uint32_t num_wm; uint32_t wm_idx[PLANE_MAX]; }; /* Loading @@ -182,7 +194,7 @@ struct cam_vfe_bus_ver3_hw_info { struct cam_vfe_bus_ver3_reg_offset_common common_reg; uint32_t num_client; struct cam_vfe_bus_ver3_reg_offset_bus_client bus_client_reg[CAM_VFE_BUS_VER3_MAX_CLIENTS]; bus_client_reg[CAM_VFE_BUS_VER3_680_MAX_CLIENTS]; uint32_t num_out; struct cam_vfe_bus_ver3_vfe_out_hw_info vfe_out_hw_info[CAM_VFE_BUS_VER3_VFE_OUT_MAX]; Loading
drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_top/include/cam_vfe_top.h +2 −1 Original line number Diff line number Diff line /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved. * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved. */ #ifndef _CAM_VFE_TOP_H_ Loading @@ -12,6 +12,7 @@ #define CAM_VFE_TOP_VER_1_0 0x100000 #define CAM_VFE_TOP_VER_2_0 0x200000 #define CAM_VFE_TOP_VER_3_0 0x300000 #define CAM_VFE_TOP_VER_4_0 0x400000 #define CAM_VFE_CAMIF_VER_1_0 0x10 #define CAM_VFE_CAMIF_VER_2_0 0x20 Loading