Commit 7d9ef7f3 authored Jun 26, 2019 by Rob Herring

dt-bindings: riscv: Limit cpus schema to only check RiscV 'cpu' nodes



Matching on the 'cpus' node was a bad choice because the schema is
incorrectly applied to non-RiscV cpus nodes. As we now have a common cpus
schema which checks the general structure, it is also redundant to do so
in the Risc-V CPU schema.

The downside is one could conceivably mix different architecture's cpu
nodes or have typos in the compatible string. The latter problem pretty
much exists for every schema.

Acked-by: Paul Walmsley <paul.walmsley@sifive.com>
Signed-off-by: Rob Herring <robh@kernel.org>

parent 15ffef1a

Documentation/devicetree/bindings/riscv/cpus.yaml

+61 −82

Original line number	Diff line number	Diff line
		@@ -10,29 +10,8 @@ maintainers:
		- Paul Walmsley <paul.walmsley@sifive.com>
		- Palmer Dabbelt <palmer@sifive.com>

		allOf:
		- $ref: /schemas/cpus.yaml#

		properties:
		$nodename:
		const: cpus
		description: Container of cpu nodes

		'#address-cells':
		const: 1
		description: \|
		A single unsigned 32-bit integer uniquely identifies each RISC-V
		hart in a system. (See the "reg" node under the "cpu" node,
		below).

		'#size-cells':
		const: 0

		patternProperties:
		'^cpu@[0-9a-f]+$':
		properties:
		compatible:
		type: array
		items:
		- enum:
		- sifive,rocket0