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Unverified Commit 7d545e77 authored by Manivannan Sadhasivam's avatar Manivannan Sadhasivam
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arm64: dts: bitmain: Add reset controller support for BM1880 SoC 



Add reset controller support for Bitmain BM1880 SoC. This commit also
adds reset support to UART peripherals.

Signed-off-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: default avatarPhilipp Zabel <p.zabel@pengutronix.de>
parent 609488bc

arch/arm64/boot/dts/bitmain/bm1880.dtsi

+11 −0
Original line number Diff line number Diff line
@@ -5,6 +5,7 @@ 
 */



#include <dt-bindings/interrupt-controller/arm-gic.h>

#include <dt-bindings/reset/bitmain,bm1880-reset.h>



/ {

	compatible = "bitmain,bm1880";
@@ -92,6 +93,12 @@ 
				compatible = "bitmain,bm1880-pinctrl";

				reg = <0x50 0x4B0>;

			};



			rst: reset-controller@c00 {

				compatible = "bitmain,bm1880-reset";

				reg = <0xc00 0x8>;

				#reset-cells = <1>;

			};

		};



		gpio0: gpio@50027000 {
@@ -154,6 +161,7 @@ 
			interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;

			reg-shift = <2>;

			reg-io-width = <4>;

			resets = <&rst BM1880_RST_UART0_1_CLK>;

			status = "disabled";

		};
@@ -163,6 +171,7 @@ 
			interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;

			reg-shift = <2>;

			reg-io-width = <4>;

			resets = <&rst BM1880_RST_UART0_1_ACLK>;

			status = "disabled";

		};
@@ -172,6 +181,7 @@ 
			interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;

			reg-shift = <2>;

			reg-io-width = <4>;

			resets = <&rst BM1880_RST_UART2_3_CLK>;

			status = "disabled";

		};
@@ -181,6 +191,7 @@ 
			interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;

			reg-shift = <2>;

			reg-io-width = <4>;

			resets = <&rst BM1880_RST_UART2_3_ACLK>;

			status = "disabled";

		};

	};