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Commit 7c2912a2 authored by Evan Quan's avatar Evan Quan Committed by Alex Deucher
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drm/amd/powerplay: init vega20 uvd/vce powergate status on dpm setup 



This is essentially necessary when uvd/vce dpm is not enabled yet.

Signed-off-by: default avatarEvan Quan <evan.quan@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 982b9031

drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

+18 −0
Original line number Diff line number Diff line
@@ -932,6 +932,21 @@ static int vega20_init_max_sustainable_clocks(struct pp_hwmgr *hwmgr) 
	return 0;

}



static void vega20_init_powergate_state(struct pp_hwmgr *hwmgr)

{

	struct vega20_hwmgr *data =

		(struct vega20_hwmgr *)(hwmgr->backend);



	data->uvd_power_gated = true;

	data->vce_power_gated = true;



	if (data->smu_features[GNLD_DPM_UVD].enabled)

		data->uvd_power_gated = false;



	if (data->smu_features[GNLD_DPM_VCE].enabled)

		data->vce_power_gated = false;

}



static int vega20_enable_dpm_tasks(struct pp_hwmgr *hwmgr)

{

	int result = 0;
@@ -954,6 +969,9 @@ static int vega20_enable_dpm_tasks(struct pp_hwmgr *hwmgr) 
			"[EnableDPMTasks] Failed to enable all smu features!",

			return result);



	/* Initialize UVD/VCE powergating state */

	vega20_init_powergate_state(hwmgr);



	result = vega20_setup_default_dpm_tables(hwmgr);

	PP_ASSERT_WITH_CODE(!result,

			"[EnableDPMTasks] Failed to setup default DPM tables!",