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Commit 7c1fabee authored by priyankar's avatar priyankar
Browse files

ARM: dts: msm: Add support for Moselle (WCN6750)

This patch contains changes for supporting
moselle soc.

Change-Id: Ibf07457c242973e0f54bcbc466cd4ee79d744578
parent 760fa934
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+1 −0
Original line number Diff line number Diff line
@@ -10,6 +10,7 @@ Required properties:
		qcom,wcn3990
		qcom,qca6390
		qcom,qca6490
		qcom,wcn6750
	- qcom,bt-reset-gpio: GPIO pin to bring BT Controller out of reset
	- qcom,wl-reset-gpio: GPIO pin for WL_EN toggle

+14 −0
Original line number Diff line number Diff line
@@ -1103,6 +1103,20 @@
			};
		};

		bt_en_sleep: bt_en_sleep {
			mux {
				pins = "gpio85";
				function = "gpio";
			};

			config {
				pins = "gpio85";
				drive-strength = <2>;
				output-low;
				bias-pull-down;
			};
		};

		qupv3_se14_2uart_pins: qupv3_se14_2uart_pins {
			qupv3_se14_default_txrx: qupv3_se14_default_txrx {
				mux {
+34 −0
Original line number Diff line number Diff line
@@ -1159,6 +1159,35 @@
		};
	};

	bluetooth: bt_wcn6750 {
		compatible = "qcom,wcn6750";
		pinctrl-names = "default";
		pinctrl-0 = <&bt_en_sleep>;
		qcom,bt-reset-gpio = <&tlmm 85 0>; /* BT_EN */
		qcom,bt-sw-ctrl-gpio = <&tlmm 86 0>; /* SW_CTRL */
		qcom,wl-reset-gpio = <&tlmm 84 0>; /* WL_EN */

		qcom,bt-vdd-io-supply = <&L19B>;  /* IO */
		qcom,bt-vdd-aon-supply = <&S7B>;
		qcom,bt-vdd-dig-supply = <&S7B>;
		qcom,bt-vdd-rfacmn-supply = <&S7B>;
		qcom,bt-vdd-rfa-0p8-supply = <&S7B>;
		qcom,bt-vdd-rfa1-supply = <&S1B>; /*RFA 1p7*/
		qcom,bt-vdd-rfa2-supply = <&S8B>; /*RFA 1p2*/
		qcom,bt-vdd-ipa-2p2-supply = <&S1C>; /*IPA 2p2*/
		qcom,bt-vdd-asd-supply = <&L11C>;

		qcom,bt-vdd-io-config = <1800000 1800000 0 1>;
		qcom,bt-vdd-aon-config = <824000 952000 0 1>;
		qcom,bt-vdd-dig-config = <824000 952000 0 1>;
		qcom,bt-vdd-rfacmn-config  = <824000 952000 0 1>;
		qcom,bt-vdd-rfa-0p8-config  = <824000 952000 0 1>;
		qcom,bt-vdd-rfa1-config = <1872000 1872000 0 1>;
		qcom,bt-vdd-rfa2-config = <1256000 1352000 0 1>;
		qcom,bt-vdd-ipa-2p2-config = <2200000 2210000 0 1>;
		qcom,bt-vdd-asd-config = <2800000 3544000 0 1>;
	};

	ufshc_mem: ufshc@1d84000 {
		compatible = "qcom,ufshc";
		reg = <0x1d84000 0x3000>,
@@ -3832,6 +3861,11 @@
#include "yupik-gpu.dtsi"
#include "yupik-thermal.dtsi"

/* HS UART */
&qupv3_se7_4uart {
	status = "ok";
};

&qupv3_se1_i2c {
	status = "ok";
	nq@64 {