Loading drivers/pci/ats.c +1 −1 Original line number Diff line number Diff line Loading @@ -432,7 +432,7 @@ EXPORT_SYMBOL_GPL(pci_prg_resp_pasid_required); * @pdev: PCI device structure * * Returns negative value when PASID capability is not present. * Otherwise it returns the numer of supported PASIDs. * Otherwise it returns the number of supported PASIDs. */ int pci_max_pasids(struct pci_dev *pdev) { Loading drivers/pci/controller/dwc/pcie-armada8k.c +1 −1 Original line number Diff line number Diff line Loading @@ -59,7 +59,7 @@ struct armada8k_pcie { #define PCIE_ARUSER_REG (PCIE_VENDOR_REGS_OFFSET + 0x5C) #define PCIE_AWUSER_REG (PCIE_VENDOR_REGS_OFFSET + 0x60) /* * AR/AW Cache defauls: Normal memory, Write-Back, Read / Write * AR/AW Cache defaults: Normal memory, Write-Back, Read / Write * allocate */ #define ARCACHE_DEFAULT_VALUE 0x3511 Loading drivers/pci/controller/dwc/pcie-kirin.c +1 −1 Original line number Diff line number Diff line Loading @@ -2,7 +2,7 @@ /* * PCIe host controller driver for Kirin Phone SoCs * * Copyright (C) 2017 Hilisicon Electronics Co., Ltd. * Copyright (C) 2017 HiSilicon Electronics Co., Ltd. * http://www.huawei.com * * Author: Xiaowei Song <songxiaowei@huawei.com> Loading drivers/pci/controller/pci-aardvark.c +1 −1 Original line number Diff line number Diff line Loading @@ -308,7 +308,7 @@ static void advk_pcie_setup_hw(struct advk_pcie *pcie) advk_writel(pcie, PCIE_ISR1_ALL_MASK, PCIE_ISR1_MASK_REG); /* Unmask all MSI's */ /* Unmask all MSIs */ advk_writel(pcie, 0, PCIE_MSI_MASK_REG); /* Enable summary interrupt for GIC SPI source */ Loading drivers/pci/controller/pcie-iproc-platform.c +1 −1 Original line number Diff line number Diff line Loading @@ -87,7 +87,7 @@ static int iproc_pcie_pltfm_probe(struct platform_device *pdev) /* * DT nodes are not used by all platforms that use the iProc PCIe * core driver. For platforms that require explict inbound mapping * core driver. For platforms that require explicit inbound mapping * configuration, "dma-ranges" would have been present in DT */ pcie->need_ib_cfg = of_property_read_bool(np, "dma-ranges"); Loading Loading
drivers/pci/ats.c +1 −1 Original line number Diff line number Diff line Loading @@ -432,7 +432,7 @@ EXPORT_SYMBOL_GPL(pci_prg_resp_pasid_required); * @pdev: PCI device structure * * Returns negative value when PASID capability is not present. * Otherwise it returns the numer of supported PASIDs. * Otherwise it returns the number of supported PASIDs. */ int pci_max_pasids(struct pci_dev *pdev) { Loading
drivers/pci/controller/dwc/pcie-armada8k.c +1 −1 Original line number Diff line number Diff line Loading @@ -59,7 +59,7 @@ struct armada8k_pcie { #define PCIE_ARUSER_REG (PCIE_VENDOR_REGS_OFFSET + 0x5C) #define PCIE_AWUSER_REG (PCIE_VENDOR_REGS_OFFSET + 0x60) /* * AR/AW Cache defauls: Normal memory, Write-Back, Read / Write * AR/AW Cache defaults: Normal memory, Write-Back, Read / Write * allocate */ #define ARCACHE_DEFAULT_VALUE 0x3511 Loading
drivers/pci/controller/dwc/pcie-kirin.c +1 −1 Original line number Diff line number Diff line Loading @@ -2,7 +2,7 @@ /* * PCIe host controller driver for Kirin Phone SoCs * * Copyright (C) 2017 Hilisicon Electronics Co., Ltd. * Copyright (C) 2017 HiSilicon Electronics Co., Ltd. * http://www.huawei.com * * Author: Xiaowei Song <songxiaowei@huawei.com> Loading
drivers/pci/controller/pci-aardvark.c +1 −1 Original line number Diff line number Diff line Loading @@ -308,7 +308,7 @@ static void advk_pcie_setup_hw(struct advk_pcie *pcie) advk_writel(pcie, PCIE_ISR1_ALL_MASK, PCIE_ISR1_MASK_REG); /* Unmask all MSI's */ /* Unmask all MSIs */ advk_writel(pcie, 0, PCIE_MSI_MASK_REG); /* Enable summary interrupt for GIC SPI source */ Loading
drivers/pci/controller/pcie-iproc-platform.c +1 −1 Original line number Diff line number Diff line Loading @@ -87,7 +87,7 @@ static int iproc_pcie_pltfm_probe(struct platform_device *pdev) /* * DT nodes are not used by all platforms that use the iProc PCIe * core driver. For platforms that require explict inbound mapping * core driver. For platforms that require explicit inbound mapping * configuration, "dma-ranges" would have been present in DT */ pcie->need_ib_cfg = of_property_read_bool(np, "dma-ranges"); Loading