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Commit 7b3ed2a1 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch '100GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/next-queue 



Jeff Kirsher says:

====================
100GbE Intel Wired LAN Driver Updates 2019-05-30

This series contains updates to ice driver only.

Brett continues his work with interrupt handling by fixing an issue
where were writing to the incorrect register to disable all VF
interrupts.

Tony consolidates the unicast and multicast MAC filters into a single
new function.

Anirudh adds support for virtual channel vector mapping to receive and
transmit queues.  This uses a bitmap to associate indicated queues with
the specified vector.  Makes several cosmetic code cleanups, as well as
update the driver to align with the current specification for managing
MAC operation codes (opcodes).

Paul adds support for Forward Error Correction (FEC) and also adds the
ethtool get and set handlers to modify FEC parameters.

Bruce cleans up the driver code to fix a number of issues, such as,
reducing the scope of some local variables, reduce the number of
de-references by changing a local variable and reorder the code to
remove unnecessary "goto's".

Dave adds switch rules to be able to handle LLDP packets and in the
process, fix a couple of issues found, like stop treating DCBx state of
"not started" as an error and stop hard coding the filter information
flag to transmit.

Jacob updates the driver to allow for more granular debugging by
developers by using a distinct separate bit for dumping firmware logs.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 84a32ede 2f2da36e

drivers/net/ethernet/intel/ice/ice.h

+1 −1
Original line number Diff line number Diff line
@@ -44,7 +44,7 @@ 
extern const char ice_drv_ver[];

#define ICE_BAR0		0

#define ICE_REQ_DESC_MULTIPLE	32

#define ICE_MIN_NUM_DESC	ICE_REQ_DESC_MULTIPLE

#define ICE_MIN_NUM_DESC	64

#define ICE_MAX_NUM_DESC	8160

#define ICE_DFLT_MIN_RX_DESC	512

/* if the default number of Rx descriptors between ICE_MAX_NUM_DESC and the

drivers/net/ethernet/intel/ice/ice_adminq_cmd.h

+15 −10
Original line number Diff line number Diff line
@@ -35,8 +35,8 @@ struct ice_aqc_get_ver { 


/* Queue Shutdown (direct 0x0003) */

struct ice_aqc_q_shutdown {

#define ICE_AQC_DRIVER_UNLOADING	BIT(0)

	__le32 driver_unloading;

#define ICE_AQC_DRIVER_UNLOADING	BIT(0)

	u8 reserved[12];

};
@@ -120,11 +120,9 @@ struct ice_aqc_manage_mac_read { 
#define ICE_AQC_MAN_MAC_WOL_ADDR_VALID		BIT(7)

#define ICE_AQC_MAN_MAC_READ_S			4

#define ICE_AQC_MAN_MAC_READ_M			(0xF << ICE_AQC_MAN_MAC_READ_S)

	u8 lport_num;

	u8 lport_num_valid;

#define ICE_AQC_MAN_MAC_PORT_NUM_IS_VALID	BIT(0)

	u8 rsvd[2];

	u8 num_addr; /* Used in response */

	u8 reserved[3];

	u8 rsvd1[3];

	__le32 addr_high;

	__le32 addr_low;

};
@@ -140,7 +138,7 @@ struct ice_aqc_manage_mac_read_resp { 


/* Manage MAC address, write command - direct (0x0108) */

struct ice_aqc_manage_mac_write {

	u8 port_num;

	u8 rsvd;

	u8 flags;

#define ICE_AQC_MAN_MAC_WR_MC_MAG_EN		BIT(0)

#define ICE_AQC_MAN_MAC_WR_WOL_LAA_PFR_KEEP	BIT(1)
@@ -920,6 +918,8 @@ struct ice_aqc_get_phy_caps_data { 
#define ICE_AQC_PHY_EN_LINK				BIT(3)

#define ICE_AQC_PHY_AN_MODE				BIT(4)

#define ICE_AQC_GET_PHY_EN_MOD_QUAL			BIT(5)

#define ICE_AQC_PHY_EN_AUTO_FEC				BIT(7)

#define ICE_AQC_PHY_CAPS_MASK				ICE_M(0xff, 0)

	u8 low_power_ctrl;

#define ICE_AQC_PHY_EN_D3COLD_LOW_POWER_AUTONEG		BIT(0)

	__le16 eee_cap;
@@ -932,6 +932,7 @@ struct ice_aqc_get_phy_caps_data { 
#define ICE_AQC_PHY_EEE_EN_40GBASE_KR4			BIT(6)

	__le16 eeer_value;

	u8 phy_id_oui[4]; /* PHY/Module ID connected on the port */

	u8 phy_fw_ver[8];

	u8 link_fec_options;

#define ICE_AQC_PHY_FEC_10G_KR_40G_KR4_EN		BIT(0)

#define ICE_AQC_PHY_FEC_10G_KR_40G_KR4_REQ		BIT(1)
@@ -940,6 +941,8 @@ struct ice_aqc_get_phy_caps_data { 
#define ICE_AQC_PHY_FEC_25G_RS_544_REQ			BIT(4)

#define ICE_AQC_PHY_FEC_25G_RS_CLAUSE91_EN		BIT(6)

#define ICE_AQC_PHY_FEC_25G_KR_CLAUSE74_EN		BIT(7)

#define ICE_AQC_PHY_FEC_MASK				ICE_M(0xdf, 0)

	u8 rsvd1;	/* Byte 35 reserved */

	u8 extended_compliance_code;

#define ICE_MODULE_TYPE_TOTAL_BYTE			3

	u8 module_type[ICE_MODULE_TYPE_TOTAL_BYTE];
@@ -954,13 +957,14 @@ struct ice_aqc_get_phy_caps_data { 
#define ICE_AQC_MOD_TYPE_BYTE2_SFP_PLUS			0xA0

#define ICE_AQC_MOD_TYPE_BYTE2_QSFP_PLUS		0x86

	u8 qualified_module_count;

	u8 rsvd2[7];	/* Bytes 47:41 reserved */

#define ICE_AQC_QUAL_MOD_COUNT_MAX			16

	struct {

		u8 v_oui[3];

		u8 rsvd1;

		u8 rsvd3;

		u8 v_part[16];

		__le32 v_rev;

		__le64 rsvd8;

		__le64 rsvd4;

	} qual_modules[ICE_AQC_QUAL_MOD_COUNT_MAX];

};
@@ -1062,6 +1066,7 @@ struct ice_aqc_get_link_status_data { 
#define ICE_AQ_LINK_25G_KR_FEC_EN	BIT(0)

#define ICE_AQ_LINK_25G_RS_528_FEC_EN	BIT(1)

#define ICE_AQ_LINK_25G_RS_544_FEC_EN	BIT(2)

#define ICE_AQ_FEC_MASK			ICE_M(0x7, 0)

	/* Pacing Config */

#define ICE_AQ_CFG_PACING_S		3

#define ICE_AQ_CFG_PACING_M		(0xF << ICE_AQ_CFG_PACING_S)
@@ -1268,7 +1273,7 @@ struct ice_aqc_get_cee_dcb_cfg_resp { 
};



/* Set Local LLDP MIB (indirect 0x0A08)

 * Used to replace the local MIB of a given LLDP agent. e.g. DCBx

 * Used to replace the local MIB of a given LLDP agent. e.g. DCBX

 */

struct ice_aqc_lldp_set_local_mib {

	u8 type;
@@ -1285,7 +1290,7 @@ struct ice_aqc_lldp_set_local_mib { 
};



/* Stop/Start LLDP Agent (direct 0x0A09)

 * Used for stopping/starting specific LLDP agent. e.g. DCBx.

 * Used for stopping/starting specific LLDP agent. e.g. DCBX.

 * The same structure is used for the response, with the command field

 * being used as the status field.

 */

drivers/net/ethernet/intel/ice/ice_common.c

+98 −23
Original line number Diff line number Diff line
@@ -304,6 +304,8 @@ ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse, 
	hw_link_info->an_info = link_data.an_info;

	hw_link_info->ext_info = link_data.ext_info;

	hw_link_info->max_frame_size = le16_to_cpu(link_data.max_frame_size);

	hw_link_info->fec_info = link_data.cfg & ICE_AQ_FEC_MASK;

	hw_link_info->topo_media_conflict = link_data.topo_media_conflict;

	hw_link_info->pacing = link_data.cfg & ICE_AQ_CFG_PACING_M;



	/* update fc info */
@@ -497,7 +499,7 @@ static enum ice_status ice_get_fw_log_cfg(struct ice_hw *hw) 
	if (!status) {

		u16 i;



		/* Save fw logging information into the hw structure */

		/* Save FW logging information into the HW structure */

		for (i = 0; i < ICE_AQC_FW_LOG_ID_MAX; i++) {

			u16 v, m, flgs;
@@ -679,17 +681,17 @@ static enum ice_status ice_cfg_fw_log(struct ice_hw *hw, bool enable) 
 */

void ice_output_fw_log(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf)

{

	ice_debug(hw, ICE_DBG_AQ_MSG, "[ FW Log Msg Start ]\n");

	ice_debug_array(hw, ICE_DBG_AQ_MSG, 16, 1, (u8 *)buf,

	ice_debug(hw, ICE_DBG_FW_LOG, "[ FW Log Msg Start ]\n");

	ice_debug_array(hw, ICE_DBG_FW_LOG, 16, 1, (u8 *)buf,

			le16_to_cpu(desc->datalen));

	ice_debug(hw, ICE_DBG_AQ_MSG, "[ FW Log Msg End ]\n");

	ice_debug(hw, ICE_DBG_FW_LOG, "[ FW Log Msg End ]\n");

}



/**

 * ice_get_itr_intrl_gran - determine int/intrl granularity

 * @hw: pointer to the HW struct

 *

 * Determines the itr/intrl granularities based on the maximum aggregate

 * Determines the ITR/intrl granularities based on the maximum aggregate

 * bandwidth according to the device's configuration during power-on.

 */

static void ice_get_itr_intrl_gran(struct ice_hw *hw)
@@ -860,6 +862,10 @@ enum ice_status ice_init_hw(struct ice_hw *hw) 
/**

 * ice_deinit_hw - unroll initialization operations done by ice_init_hw

 * @hw: pointer to the hardware structure

 *

 * This should be called only during nominal operation, not as a result of

 * ice_init_hw() failing since ice_init_hw() will take care of unrolling

 * applicable initializations if it fails for any reason.

 */

void ice_deinit_hw(struct ice_hw *hw)

{
@@ -1996,36 +2002,37 @@ ice_aq_set_phy_cfg(struct ice_hw *hw, u8 lport, 
 */

enum ice_status ice_update_link_info(struct ice_port_info *pi)

{

	struct ice_aqc_get_phy_caps_data *pcaps;

	struct ice_phy_info *phy_info;

	struct ice_link_status *li;

	enum ice_status status;

	struct ice_hw *hw;



	if (!pi)

		return ICE_ERR_PARAM;



	hw = pi->hw;



	pcaps = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*pcaps), GFP_KERNEL);

	if (!pcaps)

		return ICE_ERR_NO_MEMORY;

	li = &pi->phy.link_info;



	phy_info = &pi->phy;

	status = ice_aq_get_link_info(pi, true, NULL, NULL);

	if (status)

		goto out;

		return status;



	if (li->link_info & ICE_AQ_MEDIA_AVAILABLE) {

		struct ice_aqc_get_phy_caps_data *pcaps;

		struct ice_hw *hw;



		hw = pi->hw;

		pcaps = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*pcaps),

				     GFP_KERNEL);

		if (!pcaps)

			return ICE_ERR_NO_MEMORY;



	if (phy_info->link_info.link_info & ICE_AQ_MEDIA_AVAILABLE) {

		status = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_SW_CFG,

					     pcaps, NULL);

		if (status)

			goto out;

		if (!status)

			memcpy(li->module_type, &pcaps->module_type,

			       sizeof(li->module_type));



		memcpy(phy_info->link_info.module_type, &pcaps->module_type,

		       sizeof(phy_info->link_info.module_type));

	}

out:

		devm_kfree(ice_hw_to_dev(hw), pcaps);

	}



	return status;

}
@@ -2129,6 +2136,74 @@ ice_set_fc(struct ice_port_info *pi, u8 *aq_failures, bool ena_auto_link_update) 
	return status;

}



/**

 * ice_copy_phy_caps_to_cfg - Copy PHY ability data to configuration data

 * @caps: PHY ability structure to copy date from

 * @cfg: PHY configuration structure to copy data to

 *

 * Helper function to copy AQC PHY get ability data to PHY set configuration

 * data structure

 */

void

ice_copy_phy_caps_to_cfg(struct ice_aqc_get_phy_caps_data *caps,

			 struct ice_aqc_set_phy_cfg_data *cfg)

{

	if (!caps || !cfg)

		return;



	cfg->phy_type_low = caps->phy_type_low;

	cfg->phy_type_high = caps->phy_type_high;

	cfg->caps = caps->caps;

	cfg->low_power_ctrl = caps->low_power_ctrl;

	cfg->eee_cap = caps->eee_cap;

	cfg->eeer_value = caps->eeer_value;

	cfg->link_fec_opt = caps->link_fec_options;

}



/**

 * ice_cfg_phy_fec - Configure PHY FEC data based on FEC mode

 * @cfg: PHY configuration data to set FEC mode

 * @fec: FEC mode to configure

 *

 * Caller should copy ice_aqc_get_phy_caps_data.caps ICE_AQC_PHY_EN_AUTO_FEC

 * (bit 7) and ice_aqc_get_phy_caps_data.link_fec_options to cfg.caps

 * ICE_AQ_PHY_ENA_AUTO_FEC (bit 7) and cfg.link_fec_options before calling.

 */

void

ice_cfg_phy_fec(struct ice_aqc_set_phy_cfg_data *cfg, enum ice_fec_mode fec)

{

	switch (fec) {

	case ICE_FEC_BASER:

		/* Clear auto FEC and RS bits, and AND BASE-R ability

		 * bits and OR request bits.

		 */

		cfg->caps &= ~ICE_AQC_PHY_EN_AUTO_FEC;

		cfg->link_fec_opt &= ICE_AQC_PHY_FEC_10G_KR_40G_KR4_EN |

				     ICE_AQC_PHY_FEC_25G_KR_CLAUSE74_EN;

		cfg->link_fec_opt |= ICE_AQC_PHY_FEC_10G_KR_40G_KR4_REQ |

				     ICE_AQC_PHY_FEC_25G_KR_REQ;

		break;

	case ICE_FEC_RS:

		/* Clear auto FEC and BASE-R bits, and AND RS ability

		 * bits and OR request bits.

		 */

		cfg->caps &= ~ICE_AQC_PHY_EN_AUTO_FEC;

		cfg->link_fec_opt &= ICE_AQC_PHY_FEC_25G_RS_CLAUSE91_EN;

		cfg->link_fec_opt |= ICE_AQC_PHY_FEC_25G_RS_528_REQ |

				     ICE_AQC_PHY_FEC_25G_RS_544_REQ;

		break;

	case ICE_FEC_NONE:

		/* Clear auto FEC and all FEC option bits. */

		cfg->caps &= ~ICE_AQC_PHY_EN_AUTO_FEC;

		cfg->link_fec_opt &= ~ICE_AQC_PHY_FEC_MASK;

		break;

	case ICE_FEC_AUTO:

		/* AND auto FEC bit, and all caps bits. */

		cfg->caps &= ICE_AQC_PHY_CAPS_MASK;

		break;

	}

}



/**

 * ice_get_link_status - get status of the HW network link

 * @pi: port information structure
@@ -2624,7 +2699,7 @@ ice_aq_dis_lan_txq(struct ice_hw *hw, u8 num_qgrps, 
			ice_debug(hw, ICE_DBG_SCHED, "VM%d disable failed %d\n",

				  vmvf_num, hw->adminq.sq_last_status);

		else

			ice_debug(hw, ICE_DBG_SCHED, "disable Q %d failed %d\n",

			ice_debug(hw, ICE_DBG_SCHED, "disable queue %d failed %d\n",

				  le16_to_cpu(qg_list[0].q_id[0]),

				  hw->adminq.sq_last_status);

	}

drivers/net/ethernet/intel/ice/ice_common.h

+5 −1
Original line number Diff line number Diff line
@@ -86,7 +86,11 @@ ice_aq_set_phy_cfg(struct ice_hw *hw, u8 lport, 
enum ice_status

ice_set_fc(struct ice_port_info *pi, u8 *aq_failures,

	   bool ena_auto_link_update);



void

ice_cfg_phy_fec(struct ice_aqc_set_phy_cfg_data *cfg, enum ice_fec_mode fec);

void

ice_copy_phy_caps_to_cfg(struct ice_aqc_get_phy_caps_data *caps,

			 struct ice_aqc_set_phy_cfg_data *cfg);

enum ice_status

ice_aq_set_link_restart_an(struct ice_port_info *pi, bool ena_link,

			   struct ice_sq_cd *cd);

drivers/net/ethernet/intel/ice/ice_controlq.c

+1 −1
Original line number Diff line number Diff line
@@ -439,7 +439,7 @@ do { \ 
	/* free the buffer info list */					\

	if ((qi)->ring.cmd_buf)						\

		devm_kfree(ice_hw_to_dev(hw), (qi)->ring.cmd_buf);	\

	/* free dma head */						\

	/* free DMA head */						\

	devm_kfree(ice_hw_to_dev(hw), (qi)->ring.dma_head);		\

} while (0)