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Commit 7afc5395 authored by Rafael J. Wysocki's avatar Rafael J. Wysocki
Browse files

Merge branches 'pm-docs' and 'pm-misc' 

* pm-docs:
  Documentation: PM: Unify copyright notices
  Documentation: PM: Add SPDX license tags to multiple files
  cpufreq: intel_pstate: Documentation: Add references sections

* pm-misc:
  firmware/psci: add support for SYSTEM_RESET2
  drivers: firmware: psci: Announce support for OS initiated suspend mode
  drivers: firmware: psci: Simplify error path of psci_dt_init()
  drivers: firmware: psci: Split psci_dt_cpu_init_idle()
  MAINTAINERS: Update files for PSCI
  drivers: firmware: psci: Move psci to separate directory
parents 78baa1ea fc1860d6 4302e381

Documentation/admin-guide/pm/cpufreq.rst

+13 −5
Original line number Diff line number Diff line 
.. SPDX-License-Identifier: GPL-2.0

.. include:: <isonum.txt>



.. |struct cpufreq_policy| replace:: :c:type:`struct cpufreq_policy <cpufreq_policy>`

.. |intel_pstate| replace:: :doc:`intel_pstate <intel_pstate>`
@@ -5,9 +8,10 @@ 
CPU Performance Scaling

=======================



::

:Copyright: |copy| 2017 Intel Corporation



:Author: Rafael J. Wysocki <rafael.j.wysocki@intel.com>



 Copyright (c) 2017 Intel Corp., Rafael J. Wysocki <rafael.j.wysocki@intel.com>



The Concept of CPU Performance Scaling

======================================
@@ -396,8 +400,8 @@ RT or deadline scheduling classes, the governor will increase the frequency to 
the allowed maximum (that is, the ``scaling_max_freq`` policy limit).  In turn,

if it is invoked by the CFS scheduling class, the governor will use the

Per-Entity Load Tracking (PELT) metric for the root control group of the

given CPU as the CPU utilization estimate (see the `Per-entity load tracking`_

LWN.net article for a description of the PELT mechanism).  Then, the new

given CPU as the CPU utilization estimate (see the *Per-entity load tracking*

LWN.net article [1]_ for a description of the PELT mechanism).  Then, the new

CPU frequency to apply is computed in accordance with the formula



	f = 1.25 * ``f_0`` * ``util`` / ``max``
@@ -698,4 +702,8 @@ hardware feature (e.g. all Intel ones), even if the 
:c:macro:`CONFIG_X86_ACPI_CPUFREQ_CPB` configuration option is set.





.. _Per-entity load tracking: https://lwn.net/Articles/531853/
 
References

==========



.. [1] Jonathan Corbet, *Per-entity load tracking*,

       https://lwn.net/Articles/531853/

Documentation/admin-guide/pm/cpuidle.rst

+6 −2
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.. SPDX-License-Identifier: GPL-2.0

.. include:: <isonum.txt>



.. |struct cpuidle_state| replace:: :c:type:`struct cpuidle_state <cpuidle_state>`

.. |cpufreq| replace:: :doc:`CPU Performance Scaling <cpufreq>`
@@ -5,9 +8,10 @@ 
CPU Idle Time Management

========================



::

:Copyright: |copy| 2018 Intel Corporation



:Author: Rafael J. Wysocki <rafael.j.wysocki@intel.com>



 Copyright (c) 2018 Intel Corp., Rafael J. Wysocki <rafael.j.wysocki@intel.com>



Concepts

========

Documentation/admin-guide/pm/index.rst

+2 −0
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.. SPDX-License-Identifier: GPL-2.0



================

Power Management

================

Documentation/admin-guide/pm/intel_pstate.rst

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.. SPDX-License-Identifier: GPL-2.0

.. include:: <isonum.txt>



===============================================

``intel_pstate`` CPU Performance Scaling Driver

===============================================



::

:Copyright: |copy| 2017 Intel Corporation



 Copyright (c) 2017 Intel Corp., Rafael J. Wysocki <rafael.j.wysocki@intel.com>

:Author: Rafael J. Wysocki <rafael.j.wysocki@intel.com>





General Information
@@ -20,11 +23,10 @@ you have not done that yet.] 


For the processors supported by ``intel_pstate``, the P-state concept is broader

than just an operating frequency or an operating performance point (see the

`LinuxCon Europe 2015 presentation by Kristen Accardi <LCEU2015_>`_ for more

LinuxCon Europe 2015 presentation by Kristen Accardi [1]_ for more

information about that).  For this reason, the representation of P-states used

by ``intel_pstate`` internally follows the hardware specification (for details

refer to `Intel® 64 and IA-32 Architectures Software Developer’s Manual

Volume 3: System Programming Guide <SDM_>`_).  However, the ``CPUFreq`` core

refer to Intel Software Developer’s Manual [2]_).  However, the ``CPUFreq`` core

uses frequencies for identifying operating performance points of CPUs and

frequencies are involved in the user space interface exposed by it, so

``intel_pstate`` maps its internal representation of P-states to frequencies too
@@ -561,9 +563,9 @@ or to pin every task potentially sensitive to them to a specific CPU.] 


On the majority of systems supported by ``intel_pstate``, the ACPI tables

provided by the platform firmware contain ``_PSS`` objects returning information

that can be used for CPU performance scaling (refer to the `ACPI specification`_

for details on the ``_PSS`` objects and the format of the information returned

by them).

that can be used for CPU performance scaling (refer to the ACPI specification

[3]_ for details on the ``_PSS`` objects and the format of the information

returned by them).



The information returned by the ACPI ``_PSS`` objects is used by the

``acpi-cpufreq`` scaling driver.  On systems supported by ``intel_pstate``
@@ -728,6 +730,14 @@ P-state is called, the ``ftrace`` filter can be set to to 
           <idle>-0     [000] ..s.  2537.654843: intel_pstate_set_pstate <-intel_pstate_timer_func





.. _LCEU2015: http://events.linuxfoundation.org/sites/events/files/slides/LinuxConEurope_2015.pdf

.. _SDM: http://www.intel.com/content/www/us/en/architecture-and-technology/64-ia-32-architectures-software-developer-system-programming-manual-325384.html

.. _ACPI specification: http://www.uefi.org/sites/default/files/resources/ACPI_6_1.pdf
 
References

==========



.. [1] Kristen Accardi, *Balancing Power and Performance in the Linux Kernel*,

       http://events.linuxfoundation.org/sites/events/files/slides/LinuxConEurope_2015.pdf



.. [2] *Intel® 64 and IA-32 Architectures Software Developer’s Manual Volume 3: System Programming Guide*,

       http://www.intel.com/content/www/us/en/architecture-and-technology/64-ia-32-architectures-software-developer-system-programming-manual-325384.html



.. [3] *Advanced Configuration and Power Interface Specification*,

       https://uefi.org/sites/default/files/resources/ACPI_6_3_final_Jan30.pdf

Documentation/admin-guide/pm/sleep-states.rst

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.. SPDX-License-Identifier: GPL-2.0

.. include:: <isonum.txt>



===================

System Sleep States

===================



::

:Copyright: |copy| 2017 Intel Corporation



:Author: Rafael J. Wysocki <rafael.j.wysocki@intel.com>



 Copyright (c) 2017 Intel Corp., Rafael J. Wysocki <rafael.j.wysocki@intel.com>



Sleep states are global low-power states of the entire system in which user

space code cannot be executed and the overall system activity is significantly