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Commit 7a5e10c1 authored by Anson Huang's avatar Anson Huang Committed by Greg Kroah-Hartman
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cpufreq: imx-cpufreq-dt: Correct i.MX8MN's default speed grade value 



[ Upstream commit af44d180e3de4cb411ce327b147ea3513f0bbbcb ]

i.MX8MN has different speed grade definition compared to
i.MX8MQ/i.MX8MM, when fuses are NOT written, the default
speed_grade should be set to minimum available OPP defined
in DT which is 1.2GHz, the corresponding speed_grade value
should be 0xb.

Fixes: 5b8010ba ("cpufreq: imx-cpufreq-dt: Add i.MX8MN support")
Signed-off-by: default avatarAnson Huang <Anson.Huang@nxp.com>
Signed-off-by: default avatarViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent 0d4e867e

drivers/cpufreq/imx-cpufreq-dt.c

+10 −10
Original line number Diff line number Diff line
@@ -44,19 +44,19 @@ static int imx_cpufreq_dt_probe(struct platform_device *pdev) 
	mkt_segment = (cell_value & OCOTP_CFG3_MKT_SEGMENT_MASK) >> OCOTP_CFG3_MKT_SEGMENT_SHIFT;



	/*

	 * Early samples without fuses written report "0 0" which means

	 * consumer segment and minimum speed grading.

	 *

	 * According to datasheet minimum speed grading is not supported for

	 * consumer parts so clamp to 1 to avoid warning for "no OPPs"

	 * Early samples without fuses written report "0 0" which may NOT

	 * match any OPP defined in DT. So clamp to minimum OPP defined in

	 * DT to avoid warning for "no OPPs".

	 *

	 * Applies to i.MX8M series SoCs.

	 */

	if (mkt_segment == 0 && speed_grade == 0 && (

			of_machine_is_compatible("fsl,imx8mm") ||

			of_machine_is_compatible("fsl,imx8mn") ||

			of_machine_is_compatible("fsl,imx8mq")))

	if (mkt_segment == 0 && speed_grade == 0) {

		if (of_machine_is_compatible("fsl,imx8mm") ||

		    of_machine_is_compatible("fsl,imx8mq"))

			speed_grade = 1;

		if (of_machine_is_compatible("fsl,imx8mn"))

			speed_grade = 0xb;

	}



	supported_hw[0] = BIT(speed_grade);

	supported_hw[1] = BIT(mkt_segment);