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Commit 79730055 authored by Bhaumik Bhatt's avatar Bhaumik Bhatt
Browse files

mhi: core: move certain logs to controller log buffer 



Certain important and less frequently occurring logs can be
moved to controller log buffer to monitor bootup and shutdown.

Change-Id: I602d99adcdf8415e29930867cbcaa62d043deff0
Signed-off-by: default avatarBhaumik Bhatt <bbhatt@codeaurora.org>
parent ef5838d4

drivers/bus/mhi/core/mhi_boot.c

+54 −53
Original line number Diff line number Diff line
@@ -51,7 +51,7 @@ static void mhi_process_sfr(struct mhi_controller *mhi_cntrl, 
		rem_seg_len = 0;

		seg_idx++;

		if (seg_idx == mhi_cntrl->rddm_image->entries) {

			MHI_ERR("invalid size for SFR file\n");

			MHI_CNTRL_ERR("invalid size for SFR file\n");

			goto err;

		}

	}
@@ -80,7 +80,7 @@ static int mhi_find_next_file_offset(struct mhi_controller *mhi_cntrl, 
	while (info->file_size) {

		info->seg_idx++;

		if (info->seg_idx == mhi_cntrl->rddm_image->entries) {

			MHI_ERR("invalid size for file %s\n",

			MHI_CNTRL_ERR("invalid size for file %s\n",

					table_info->file_name);

			return -EINVAL;

		}
@@ -111,14 +111,14 @@ void mhi_dump_sfr(struct mhi_controller *mhi_cntrl) 


	if (rddm_header->header_size > sizeof(*rddm_header) ||

			rddm_header->header_size < 8) {

		MHI_ERR("invalid reported header size %u\n",

		MHI_CNTRL_ERR("invalid reported header size %u\n",

				rddm_header->header_size);

		return;

	}



	table_size = (rddm_header->header_size - 8) / sizeof(*table_info);

	if (!table_size) {

		MHI_ERR("invalid rddm table size %u\n", table_size);

		MHI_CNTRL_ERR("invalid rddm table size %u\n", table_size);

		return;

	}
@@ -150,13 +150,13 @@ void mhi_rddm_prepare(struct mhi_controller *mhi_cntrl, 
	int i = 0;



	for (i = 0; i < img_info->entries - 1; i++, mhi_buf++, bhi_vec++) {

		MHI_VERB("Setting vector:%pad size:%zu\n",

		MHI_CNTRL_LOG("Setting vector:%pad size:%zu\n",

				&mhi_buf->dma_addr, mhi_buf->len);

		bhi_vec->dma_addr = mhi_buf->dma_addr;

		bhi_vec->size = mhi_buf->len;

	}



	MHI_LOG("BHIe programming for RDDM\n");

	MHI_CNTRL_LOG("BHIe programming for RDDM\n");



	mhi_cntrl->write_reg(mhi_cntrl, base, BHIE_RXVECADDR_HIGH_OFFS,

		      upper_32_bits(mhi_buf->dma_addr));
@@ -175,7 +175,7 @@ void mhi_rddm_prepare(struct mhi_controller *mhi_cntrl, 
			    BHIE_RXVECDB_SEQNUM_BMSK, BHIE_RXVECDB_SEQNUM_SHFT,

			    sequence_id);



	MHI_LOG("address:%pad len:0x%lx sequence:%u\n",

	MHI_CNTRL_LOG("address:%pad len:0x%lx sequence:%u\n",

			&mhi_buf->dma_addr, mhi_buf->len, sequence_id);

}
@@ -191,7 +191,7 @@ static int __mhi_download_rddm_in_panic(struct mhi_controller *mhi_cntrl) 
	int rddm_retry = rddm_timeout_us / delayus; /* time to enter rddm */

	void __iomem *base = mhi_cntrl->bhie;



	MHI_LOG("Entered with pm_state:%s dev_state:%s ee:%s\n",

	MHI_CNTRL_LOG("Entered with pm_state:%s dev_state:%s ee:%s\n",

			to_mhi_pm_state_str(mhi_cntrl->pm_state),

			TO_MHI_STATE_STR(mhi_cntrl->dev_state),

			TO_MHI_EXEC_STR(mhi_cntrl->ee));
@@ -219,10 +219,10 @@ static int __mhi_download_rddm_in_panic(struct mhi_controller *mhi_cntrl) 
	ee = mhi_get_exec_env(mhi_cntrl);

	if (ee != MHI_EE_RDDM) {



		MHI_LOG("Trigger device into RDDM mode using SYSERR\n");

		MHI_CNTRL_LOG("Trigger device into RDDM mode using SYSERR\n");

		mhi_set_mhi_state(mhi_cntrl, MHI_STATE_SYS_ERR);



		MHI_LOG("Waiting for device to enter RDDM\n");

		MHI_CNTRL_LOG("Waiting for device to enter RDDM\n");

		while (rddm_retry--) {

			ee = mhi_get_exec_env(mhi_cntrl);

			if (ee == MHI_EE_RDDM)
@@ -233,7 +233,7 @@ static int __mhi_download_rddm_in_panic(struct mhi_controller *mhi_cntrl) 


		if (rddm_retry <= 0) {

			/* Hardware reset; force device to enter rddm */

			MHI_LOG(

			MHI_CNTRL_LOG(

				"Did not enter RDDM, do a host req. reset\n");

			mhi_cntrl->write_reg(mhi_cntrl, mhi_cntrl->regs,

				      MHI_SOC_RESET_REQ_OFFSET,
@@ -244,7 +244,7 @@ static int __mhi_download_rddm_in_panic(struct mhi_controller *mhi_cntrl) 
		ee = mhi_get_exec_env(mhi_cntrl);

	}



	MHI_LOG("Waiting for image download completion, current EE:%s\n",

	MHI_CNTRL_LOG("Waiting for image download completion, current EE:%s\n",

			TO_MHI_EXEC_STR(ee));

	while (retry--) {

		ret = mhi_read_reg_field(mhi_cntrl, base, BHIE_RXVECSTATUS_OFFS,
@@ -255,7 +255,7 @@ static int __mhi_download_rddm_in_panic(struct mhi_controller *mhi_cntrl) 
			return -EIO;



		if (rx_status == BHIE_RXVECSTATUS_STATUS_XFER_COMPL) {

			MHI_LOG("RDDM successfully collected\n");

			MHI_CNTRL_LOG("RDDM successfully collected\n");

			return 0;

		}
@@ -265,9 +265,9 @@ static int __mhi_download_rddm_in_panic(struct mhi_controller *mhi_cntrl) 
	ee = mhi_get_exec_env(mhi_cntrl);

	ret = mhi_read_reg(mhi_cntrl, base, BHIE_RXVECSTATUS_OFFS, &rx_status);



	MHI_ERR("Did not complete RDDM transfer\n");

	MHI_ERR("Current EE:%s\n", TO_MHI_EXEC_STR(ee));

	MHI_ERR("RXVEC_STATUS:0x%x, ret:%d\n", rx_status, ret);

	MHI_CNTRL_ERR("Did not complete RDDM transfer\n");

	MHI_CNTRL_ERR("Current EE:%s\n", TO_MHI_EXEC_STR(ee));

	MHI_CNTRL_ERR("RXVEC_STATUS:0x%x, ret:%d\n", rx_status, ret);



	return -EIO;

}
@@ -281,7 +281,7 @@ int mhi_download_rddm_img(struct mhi_controller *mhi_cntrl, bool in_panic) 
	if (in_panic)

		return __mhi_download_rddm_in_panic(mhi_cntrl);



	MHI_LOG("Waiting for image download completion\n");

	MHI_CNTRL_LOG("Waiting for image download completion\n");



	/* waiting for image download completion */

	wait_event_timeout(mhi_cntrl->state_event,
@@ -309,7 +309,7 @@ static int mhi_fw_load_amss(struct mhi_controller *mhi_cntrl, 
		return -EIO;

	}



	MHI_LOG("Starting BHIe Programming\n");

	MHI_CNTRL_LOG("Starting BHIe Programming\n");



	mhi_cntrl->write_reg(mhi_cntrl, base, BHIE_TXVECADDR_HIGH_OFFS,

		      upper_32_bits(mhi_buf->dma_addr));
@@ -329,11 +329,11 @@ static int mhi_fw_load_amss(struct mhi_controller *mhi_cntrl, 
			    mhi_cntrl->sequence_id);

	read_unlock_bh(pm_lock);



	MHI_LOG("Upper:0x%x Lower:0x%x len:0x%lx sequence:%u\n",

	MHI_CNTRL_LOG("Upper:0x%x Lower:0x%x len:0x%lx sequence:%u\n",

			upper_32_bits(mhi_buf->dma_addr),

			lower_32_bits(mhi_buf->dma_addr),

			mhi_buf->len, mhi_cntrl->sequence_id);

	MHI_LOG("Waiting for image transfer completion\n");

	MHI_CNTRL_LOG("Waiting for image transfer completion\n");



	/* waiting for image download completion */

	wait_event_timeout(mhi_cntrl->state_event,
@@ -370,7 +370,7 @@ static int mhi_fw_load_sbl(struct mhi_controller *mhi_cntrl, 
		{ NULL },

	};



	MHI_LOG("Starting BHI programming\n");

	MHI_CNTRL_LOG("Starting BHI programming\n");



	/* program start sbl download via  bhi protocol */

	read_lock_bh(pm_lock);
@@ -393,7 +393,7 @@ static int mhi_fw_load_sbl(struct mhi_controller *mhi_cntrl, 
			mhi_cntrl->session_id);

	read_unlock_bh(pm_lock);



	MHI_LOG("Waiting for image transfer completion\n");

	MHI_CNTRL_LOG("Waiting for image transfer completion\n");



	/* waiting for image download completion */

	wait_event_timeout(mhi_cntrl->state_event,
@@ -406,7 +406,7 @@ static int mhi_fw_load_sbl(struct mhi_controller *mhi_cntrl, 
		goto invalid_pm_state;



	if (tx_status == BHI_STATUS_ERROR) {

		MHI_ERR("Image transfer failed\n");

		MHI_CNTRL_ERR("Image transfer failed\n");

		read_lock_bh(pm_lock);

		if (MHI_REG_ACCESS_VALID(mhi_cntrl->pm_state)) {

			for (i = 0; error_reg[i].name; i++) {
@@ -414,7 +414,7 @@ static int mhi_fw_load_sbl(struct mhi_controller *mhi_cntrl, 
						   error_reg[i].offset, &val);

				if (ret)

					break;

				MHI_ERR("reg:%s value:0x%x\n",

				MHI_CNTRL_ERR("reg:%s value:0x%x\n",

					      error_reg[i].name, val);

			}

		}
@@ -454,7 +454,7 @@ int mhi_alloc_bhie_table(struct mhi_controller *mhi_cntrl, 
	struct image_info *img_info;

	struct mhi_buf *mhi_buf;



	MHI_LOG("Allocating bytes:%zu seg_size:%zu total_seg:%u\n",

	MHI_CNTRL_LOG("Allocating bytes:%zu seg_size:%zu total_seg:%u\n",

			alloc_size, seg_size, segments);



	img_info = kzalloc(sizeof(*img_info), GFP_KERNEL);
@@ -482,7 +482,7 @@ int mhi_alloc_bhie_table(struct mhi_controller *mhi_cntrl, 
		if (!mhi_buf->buf)

			goto error_alloc_segment;



		MHI_LOG("Entry:%d Address:0x%llx size:%lu\n", i,

		MHI_CNTRL_LOG("Entry:%d Address:0x%llx size:%lu\n", i,

			mhi_buf->dma_addr, mhi_buf->len);

	}
@@ -490,7 +490,7 @@ int mhi_alloc_bhie_table(struct mhi_controller *mhi_cntrl, 
	img_info->entries = segments;

	*image_info = img_info;



	MHI_LOG("Successfully allocated bhi vec table\n");

	MHI_CNTRL_LOG("Successfully allocated bhi vec table\n");



	return 0;
@@ -545,11 +545,11 @@ void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl) 
	size_t size;



	if (MHI_PM_IN_ERROR_STATE(mhi_cntrl->pm_state)) {

		MHI_ERR("MHI is not in valid state\n");

		MHI_CNTRL_ERR("MHI is not in valid state\n");

		return;

	}



	MHI_LOG("Device current EE:%s\n", TO_MHI_EXEC_STR(mhi_cntrl->ee));

	MHI_CNTRL_LOG("Device current EE:%s\n", TO_MHI_EXEC_STR(mhi_cntrl->ee));



	/* if device in pthru, do reset to ready state transition */

	if (mhi_cntrl->ee == MHI_EE_PTHRU)
@@ -560,14 +560,15 @@ void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl) 


	if (!fw_name || (mhi_cntrl->fbc_download && (!mhi_cntrl->sbl_size ||

						     !mhi_cntrl->seg_len))) {

		MHI_ERR("No firmware image defined or !sbl_size || !seg_len\n");

		MHI_CNTRL_ERR(

			"No firmware image defined or !sbl_size || !seg_len\n");

		return;

	}



	ret = request_firmware(&firmware, fw_name, mhi_cntrl->dev);

	if (ret) {

		if (!mhi_cntrl->fw_image_fallback) {

			MHI_ERR("Error loading fw, ret:%d\n", ret);

			MHI_CNTRL_ERR("Error loading fw, ret:%d\n", ret);

			return;

		}
@@ -575,7 +576,7 @@ void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl) 
		ret = request_firmware(&firmware, mhi_cntrl->fw_image_fallback,

				mhi_cntrl->dev);

		if (ret) {

			MHI_ERR("Error loading fw_fb, ret:%d\n", ret);

			MHI_CNTRL_ERR("Error loading fw_fb, ret:%d\n", ret);

			return;

		}
@@ -591,7 +592,7 @@ void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl) 


	buf = mhi_alloc_coherent(mhi_cntrl, size, &dma_addr, GFP_KERNEL);

	if (!buf) {

		MHI_ERR("Could not allocate memory for image\n");

		MHI_CNTRL_ERR("Could not allocate memory for image\n");

		release_firmware(firmware);

		return;

	}
@@ -620,11 +621,11 @@ void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl) 
		ret = mhi_alloc_bhie_table(mhi_cntrl, &mhi_cntrl->fbc_image,

					   firmware->size);

		if (ret) {

			MHI_ERR("Error alloc size of %zu\n", firmware->size);

			MHI_CNTRL_ERR("Error alloc size:%zu\n", firmware->size);

			goto error_alloc_fw_table;

		}



		MHI_LOG("Copying firmware image into vector table\n");

		MHI_CNTRL_LOG("Copying firmware image into vector table\n");



		/* load the firmware into BHIE vec table */

		mhi_firmware_copy(mhi_cntrl, firmware, mhi_cntrl->fbc_image);
@@ -634,7 +635,7 @@ void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl) 
	/* transitioning into MHI RESET->READY state */

	ret = mhi_ready_state_transition(mhi_cntrl);



	MHI_LOG("To Reset->Ready PM_STATE:%s MHI_STATE:%s EE:%s, ret:%d\n",

	MHI_CNTRL_LOG("To Reset->Ready PM_STATE:%s MHI_STATE:%s EE:%s ret:%d\n",

			to_mhi_pm_state_str(mhi_cntrl->pm_state),

			TO_MHI_STATE_STR(mhi_cntrl->dev_state),

			TO_MHI_EXEC_STR(mhi_cntrl->ee), ret);
@@ -643,7 +644,7 @@ void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl) 
		return;



	if (ret) {

		MHI_ERR("Did not transition to READY state\n");

		MHI_CNTRL_ERR("Did not transition to READY state\n");

		goto error_read;

	}
@@ -654,7 +655,7 @@ void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl) 
				 msecs_to_jiffies(mhi_cntrl->timeout_ms));



	if (!ret || MHI_PM_IN_ERROR_STATE(mhi_cntrl->pm_state)) {

		MHI_ERR("MHI did not enter BHIE\n");

		MHI_CNTRL_ERR("MHI did not enter BHIE\n");

		goto error_read;

	}
@@ -664,7 +665,7 @@ void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl) 
			       /* last entry is vec table */

			       &image_info->mhi_buf[image_info->entries - 1]);



	MHI_LOG("amss fw_load, ret:%d\n", ret);

	MHI_CNTRL_LOG("amss fw_load ret:%d\n", ret);



	release_firmware(firmware);

drivers/bus/mhi/core/mhi_init.c

+15 −15
Original line number Diff line number Diff line
@@ -435,7 +435,7 @@ int mhi_init_irq_setup(struct mhi_controller *mhi_cntrl) 
				  mhi_msi_handlr, IRQF_SHARED | IRQF_NO_SUSPEND,

				  "mhi", mhi_event);

		if (ret) {

			MHI_ERR("Error requesting irq:%d for ev:%d\n",

			MHI_CNTRL_ERR("Error requesting irq:%d for ev:%d\n",

					mhi_cntrl->irq[mhi_event->msi], i);

			goto error_request;

		}
@@ -792,7 +792,7 @@ static int mhi_init_timesync(struct mhi_controller *mhi_cntrl) 
	ret = mhi_get_capability_offset(mhi_cntrl, TIMESYNC_CAP_ID,

					&time_offset);

	if (ret) {

		MHI_LOG("No timesync capability found\n");

		MHI_CNTRL_LOG("No timesync capability found\n");

		return ret;

	}
@@ -807,7 +807,7 @@ static int mhi_init_timesync(struct mhi_controller *mhi_cntrl) 
	INIT_LIST_HEAD(&mhi_tsync->head);



	/* save time_offset for obtaining time */

	MHI_LOG("TIME OFFS:0x%x\n", time_offset);

	MHI_CNTRL_LOG("TIME OFFS:0x%x\n", time_offset);

	mhi_tsync->time_reg = mhi_cntrl->regs + time_offset

			      + TIMESYNC_TIME_LOW_OFFSET;
@@ -816,7 +816,7 @@ static int mhi_init_timesync(struct mhi_controller *mhi_cntrl) 
	/* get timesync event ring configuration */

	er_index = mhi_get_er_index(mhi_cntrl, MHI_ER_TSYNC_ELEMENT_TYPE);

	if (er_index < 0) {

		MHI_LOG("Could not find timesync event ring\n");

		MHI_CNTRL_LOG("Could not find timesync event ring\n");

		return er_index;

	}
@@ -845,7 +845,7 @@ int mhi_init_sfr(struct mhi_controller *mhi_cntrl) 
	sfr_info->buf_addr = mhi_alloc_coherent(mhi_cntrl, sfr_info->len,

					&sfr_info->dma_addr, GFP_KERNEL);

	if (!sfr_info->buf_addr) {

		MHI_ERR("Failed to allocate memory for sfr\n");

		MHI_CNTRL_ERR("Failed to allocate memory for sfr\n");

		return -ENOMEM;

	}
@@ -853,14 +853,14 @@ int mhi_init_sfr(struct mhi_controller *mhi_cntrl) 


	ret = mhi_send_cmd(mhi_cntrl, NULL, MHI_CMD_SFR_CFG);

	if (ret) {

		MHI_ERR("Failed to send sfr cfg cmd\n");

		MHI_CNTRL_ERR("Failed to send sfr cfg cmd\n");

		return ret;

	}



	ret = wait_for_completion_timeout(&sfr_info->completion,

			msecs_to_jiffies(mhi_cntrl->timeout_ms));

	if (!ret || sfr_info->ccs != MHI_EV_CC_SUCCESS) {

		MHI_ERR("Failed to get sfr cfg cmd completion\n");

		MHI_CNTRL_ERR("Failed to get sfr cfg cmd completion\n");

		return -EIO;

	}
@@ -888,7 +888,7 @@ static int mhi_init_bw_scale(struct mhi_controller *mhi_cntrl) 


	bw_cfg_offset += BW_SCALE_CFG_OFFSET;



	MHI_LOG("BW_CFG OFFSET:0x%x\n", bw_cfg_offset);

	MHI_CNTRL_LOG("BW_CFG OFFSET:0x%x\n", bw_cfg_offset);



	/* advertise host support */

	mhi_cntrl->write_reg(mhi_cntrl, mhi_cntrl->regs, bw_cfg_offset,
@@ -977,7 +977,7 @@ int mhi_init_mmio(struct mhi_controller *mhi_cntrl) 
		{ 0, 0, 0 }

	};



	MHI_LOG("Initializing MMIO\n");

	MHI_CNTRL_LOG("Initializing MMIO\n");



	/* set up DB register for all the chan rings */

	ret = mhi_read_reg_field(mhi_cntrl, base, CHDBOFF, CHDBOFF_CHDBOFF_MASK,
@@ -985,7 +985,7 @@ int mhi_init_mmio(struct mhi_controller *mhi_cntrl) 
	if (ret)

		return -EIO;



	MHI_LOG("CHDBOFF:0x%x\n", val);

	MHI_CNTRL_LOG("CHDBOFF:0x%x\n", val);



	/* setup wake db */

	mhi_cntrl->wake_db = base + val + (8 * MHI_DEV_WAKE_DB);
@@ -1008,7 +1008,7 @@ int mhi_init_mmio(struct mhi_controller *mhi_cntrl) 
	if (ret)

		return -EIO;



	MHI_LOG("ERDBOFF:0x%x\n", val);

	MHI_CNTRL_LOG("ERDBOFF:0x%x\n", val);



	mhi_event = mhi_cntrl->mhi_event;

	for (i = 0; i < mhi_cntrl->total_ev_rings; i++, val += 8, mhi_event++) {
@@ -1021,7 +1021,7 @@ int mhi_init_mmio(struct mhi_controller *mhi_cntrl) 
	/* set up DB register for primary CMD rings */

	mhi_cntrl->mhi_cmd[PRIMARY_CMD_RING].ring.db_addr = base + CRDB_LOWER;



	MHI_LOG("Programming all MMIO values.\n");

	MHI_CNTRL_LOG("Programming all MMIO values.\n");

	for (i = 0; reg_info[i].offset; i++)

		mhi_write_reg_field(mhi_cntrl, base, reg_info[i].offset,

				    reg_info[i].mask, reg_info[i].shift,
@@ -1772,7 +1772,7 @@ int mhi_prepare_for_power_up(struct mhi_controller *mhi_cntrl) 


	ret = mhi_init_dev_ctxt(mhi_cntrl);

	if (ret) {

		MHI_ERR("Error with init dev_ctxt\n");

		MHI_CNTRL_ERR("Error with init dev_ctxt\n");

		goto error_dev_ctxt;

	}
@@ -1792,7 +1792,7 @@ int mhi_prepare_for_power_up(struct mhi_controller *mhi_cntrl) 
			ret = mhi_read_reg(mhi_cntrl, mhi_cntrl->regs, BHIEOFF,

					   &bhie_off);

			if (ret) {

				MHI_ERR("Error getting bhie offset\n");

				MHI_CNTRL_ERR("Error getting bhie offset\n");

				goto bhie_error;

			}

drivers/bus/mhi/core/mhi_pm.c

+60 −54
Original line number Diff line number Diff line
@@ -256,7 +256,7 @@ int mhi_ready_state_transition(struct mhi_controller *mhi_cntrl) 
	enum MHI_PM_STATE cur_state;

	int ret, i;



	MHI_LOG("Waiting to enter READY state\n");

	MHI_CNTRL_LOG("Waiting to enter READY state\n");



	/* wait for RESET to be cleared and READY bit to be set */

	wait_event_timeout(mhi_cntrl->state_event,
@@ -278,14 +278,14 @@ int mhi_ready_state_transition(struct mhi_controller *mhi_cntrl) 
	if (reset || !ready)

		return -ETIMEDOUT;



	MHI_LOG("Device in READY State\n");

	MHI_CNTRL_LOG("Device in READY State\n");

	write_lock_irq(&mhi_cntrl->pm_lock);

	cur_state = mhi_tryset_pm_state(mhi_cntrl, MHI_PM_POR);

	mhi_cntrl->dev_state = MHI_STATE_READY;

	write_unlock_irq(&mhi_cntrl->pm_lock);



	if (cur_state != MHI_PM_POR) {

		MHI_ERR("Error moving to state %s from %s\n",

		MHI_CNTRL_ERR("Error moving to state %s from %s\n",

				to_mhi_pm_state_str(MHI_PM_POR),

				to_mhi_pm_state_str(cur_state));

		return -EIO;
@@ -296,7 +296,7 @@ int mhi_ready_state_transition(struct mhi_controller *mhi_cntrl) 


	ret = mhi_init_mmio(mhi_cntrl);

	if (ret) {

		MHI_ERR("Error programming mmio registers\n");

		MHI_CNTRL_ERR("Error programming mmio registers\n");

		goto error_mmio;

	}
@@ -475,7 +475,7 @@ static int mhi_pm_mission_mode_transition(struct mhi_controller *mhi_cntrl) 
	enum mhi_ee ee = 0;

	struct mhi_event *mhi_event;



	MHI_LOG("Processing Mission Mode Transition\n");

	MHI_CNTRL_LOG("Processing Mission Mode Transition\n");



	write_lock_irq(&mhi_cntrl->pm_lock);

	if (MHI_REG_ACCESS_VALID(mhi_cntrl->pm_state))
@@ -483,7 +483,7 @@ static int mhi_pm_mission_mode_transition(struct mhi_controller *mhi_cntrl) 
	write_unlock_irq(&mhi_cntrl->pm_lock);



	if (!MHI_IN_MISSION_MODE(ee)) {

		MHI_ERR("Invalid EE:%s\n", TO_MHI_EXEC_STR(ee));

		MHI_CNTRL_ERR("Invalid EE:%s\n", TO_MHI_EXEC_STR(ee));

		return -EIO;

	}
@@ -546,7 +546,7 @@ static int mhi_pm_mission_mode_transition(struct mhi_controller *mhi_cntrl) 
	/* setup sysfs nodes for userspace votes */

	mhi_create_sysfs(mhi_cntrl);



	MHI_LOG("Adding new devices\n");

	MHI_CNTRL_LOG("Adding new devices\n");



	/* add supported devices */

	mhi_create_devices(mhi_cntrl);
@@ -557,7 +557,7 @@ static int mhi_pm_mission_mode_transition(struct mhi_controller *mhi_cntrl) 
	mhi_cntrl->wake_put(mhi_cntrl, false);

	read_unlock_bh(&mhi_cntrl->pm_lock);



	MHI_LOG("Exit with ret:%d\n", ret);

	MHI_CNTRL_LOG("Exit with ret:%d\n", ret);



	return ret;

}
@@ -574,7 +574,8 @@ static void mhi_pm_disable_transition(struct mhi_controller *mhi_cntrl, 
	struct mhi_sfr_info *sfr_info = mhi_cntrl->mhi_sfr;

	int ret, i;



	MHI_LOG("Enter with from pm_state:%s MHI_STATE:%s to pm_state:%s\n",

	MHI_CNTRL_LOG(

		"Enter with from pm_state:%s MHI_STATE:%s to pm_state:%s\n",

		to_mhi_pm_state_str(mhi_cntrl->pm_state),

		TO_MHI_STATE_STR(mhi_cntrl->dev_state),

		to_mhi_pm_state_str(transition_state));
@@ -605,7 +606,7 @@ static void mhi_pm_disable_transition(struct mhi_controller *mhi_cntrl, 


	/* not handling sys_err, could be middle of shut down */

	if (cur_state != transition_state) {

		MHI_LOG("Failed to transition to state:0x%x from:0x%x\n",

		MHI_CNTRL_LOG("Failed to transition to state:0x%x from:0x%x\n",

				transition_state, cur_state);

		mutex_unlock(&mhi_cntrl->pm_mutex);

		return;
@@ -615,7 +616,7 @@ static void mhi_pm_disable_transition(struct mhi_controller *mhi_cntrl, 
	if (MHI_REG_ACCESS_VALID(prev_state)) {

		unsigned long timeout = msecs_to_jiffies(mhi_cntrl->timeout_ms);



		MHI_LOG("Trigger device into MHI_RESET\n");

		MHI_CNTRL_LOG("Trigger device into MHI_RESET\n");



		write_lock_irq(&mhi_cntrl->pm_lock);

		mhi_set_mhi_state(mhi_cntrl, MHI_STATE_RESET);
@@ -641,7 +642,8 @@ static void mhi_pm_disable_transition(struct mhi_controller *mhi_cntrl, 
		mhi_cntrl->initiate_mhi_reset = false;

	}



	MHI_LOG("Waiting for all pending event ring processing to complete\n");

	MHI_CNTRL_LOG(

		"Waiting for all pending event ring processing to complete\n");

	mhi_event = mhi_cntrl->mhi_event;

	for (i = 0; i < mhi_cntrl->total_ev_rings; i++, mhi_event++) {

		if (!mhi_event->request_irq)
@@ -651,7 +653,7 @@ static void mhi_pm_disable_transition(struct mhi_controller *mhi_cntrl, 


	mutex_unlock(&mhi_cntrl->pm_mutex);



	MHI_LOG("Reset all active channels and remove mhi devices\n");

	MHI_CNTRL_LOG("Reset all active channels and remove mhi devices\n");

	device_for_each_child(mhi_cntrl->dev, NULL, mhi_destroy_device);



	MHI_LOG("Finish resetting channels\n");
@@ -659,7 +661,7 @@ static void mhi_pm_disable_transition(struct mhi_controller *mhi_cntrl, 
	/* remove support for userspace votes */

	mhi_destroy_sysfs(mhi_cntrl);



	MHI_LOG("Waiting for all pending threads to complete\n");

	MHI_CNTRL_LOG("Waiting for all pending threads to complete\n");

	wake_up_all(&mhi_cntrl->state_event);

	flush_work(&mhi_cntrl->special_work);
@@ -675,7 +677,7 @@ static void mhi_pm_disable_transition(struct mhi_controller *mhi_cntrl, 
	MHI_ASSERT(atomic_read(&mhi_cntrl->pending_pkts), "pending_pkts != 0");



	/* reset the ev rings and cmd rings */

	MHI_LOG("Resetting EV CTXT and CMD CTXT\n");

	MHI_CNTRL_LOG("Resetting EV CTXT and CMD CTXT\n");

	mhi_cmd = mhi_cntrl->mhi_cmd;

	cmd_ctxt = mhi_cntrl->mhi_ctxt->cmd_ctxt;

	for (i = 0; i < NR_OF_CMD_RINGS; i++, mhi_cmd++, cmd_ctxt++) {
@@ -711,12 +713,13 @@ static void mhi_pm_disable_transition(struct mhi_controller *mhi_cntrl, 
		cur_state = mhi_tryset_pm_state(mhi_cntrl, MHI_PM_DISABLE);

		write_unlock_irq(&mhi_cntrl->pm_lock);

		if (unlikely(cur_state != MHI_PM_DISABLE))

			MHI_ERR("Error moving from pm state:%s to state:%s\n",

			MHI_CNTRL_ERR(

				"Error moving from pm state:%s to state:%s\n",

				to_mhi_pm_state_str(cur_state),

				to_mhi_pm_state_str(MHI_PM_DISABLE));

	}



	MHI_LOG("Exit with pm_state:%s mhi_state:%s\n",

	MHI_CNTRL_LOG("Exit with pm_state:%s mhi_state:%s\n",

			to_mhi_pm_state_str(mhi_cntrl->pm_state),

			TO_MHI_STATE_STR(mhi_cntrl->dev_state));
@@ -740,7 +743,7 @@ int mhi_debugfs_trigger_reset(void *data, u64 val) 
	enum MHI_PM_STATE cur_state;

	int ret;



	MHI_LOG("Trigger MHI Reset\n");

	MHI_CNTRL_LOG("Trigger MHI Reset\n");



	/* exit lpm first */

	mhi_cntrl->runtime_get(mhi_cntrl, mhi_cntrl->priv_data);
@@ -752,7 +755,8 @@ int mhi_debugfs_trigger_reset(void *data, u64 val) 
				 msecs_to_jiffies(mhi_cntrl->timeout_ms));



	if (!ret || MHI_PM_IN_ERROR_STATE(mhi_cntrl->pm_state)) {

		MHI_ERR("Did not enter M0 state, cur_state:%s pm_state:%s\n",

		MHI_CNTRL_ERR(

			"Did not enter M0 state, cur_state:%s pm_state:%s\n",

			TO_MHI_STATE_STR(mhi_cntrl->dev_state),

			to_mhi_pm_state_str(mhi_cntrl->pm_state));

		return -EIO;
@@ -856,7 +860,8 @@ void mhi_process_sys_err(struct mhi_controller *mhi_cntrl) 
	 * instead we will jump directly to rddm state

	 */

	if (mhi_cntrl->rddm_image) {

		MHI_LOG("Controller supports RDDM, skipping SYS_ERR_PROCESS\n");

		MHI_CNTRL_LOG(

			"Controller supports RDDM, skipping SYS_ERR_PROCESS\n");

		return;

	}
@@ -880,7 +885,7 @@ void mhi_pm_st_worker(struct work_struct *work) 


	list_for_each_entry_safe(itr, tmp, &head, node) {

		list_del(&itr->node);

		MHI_LOG("Transition to state:%s\n",

		MHI_CNTRL_LOG("Transition to state:%s\n",

				TO_MHI_STATE_TRANS_STR(itr->state));



		switch (itr->state) {
@@ -918,7 +923,7 @@ int mhi_async_power_up(struct mhi_controller *mhi_cntrl) 
	enum MHI_ST_TRANSITION next_state;

	struct mhi_device *mhi_dev = mhi_cntrl->mhi_dev;



	MHI_LOG("Requested to power on\n");

	MHI_CNTRL_LOG("Requested to power on\n");



	if (mhi_cntrl->msi_allocated < mhi_cntrl->total_ev_rings)

		return -EINVAL;
@@ -943,14 +948,14 @@ int mhi_async_power_up(struct mhi_controller *mhi_cntrl) 
		/* setup device context */

		ret = mhi_init_dev_ctxt(mhi_cntrl);

		if (ret) {

			MHI_ERR("Error setting dev_context\n");

			MHI_CNTRL_ERR("Error setting dev_context\n");

			goto error_dev_ctxt;

		}

	}



	ret = mhi_init_irq_setup(mhi_cntrl);

	if (ret) {

		MHI_ERR("Error setting up irq\n");

		MHI_CNTRL_ERR("Error setting up irq\n");

		goto error_setup_irq;

	}
@@ -970,7 +975,7 @@ int mhi_async_power_up(struct mhi_controller *mhi_cntrl) 
		ret = mhi_read_reg(mhi_cntrl, mhi_cntrl->regs, BHIEOFF, &val);

		if (ret) {

			write_unlock_irq(&mhi_cntrl->pm_lock);

			MHI_ERR("Error getting bhie offset\n");

			MHI_CNTRL_ERR("Error getting bhie offset\n");

			goto error_bhi_offset;

		}
@@ -986,7 +991,8 @@ int mhi_async_power_up(struct mhi_controller *mhi_cntrl) 


	/* confirm device is in valid exec env */

	if (!MHI_IN_PBL(current_ee) && current_ee != MHI_EE_AMSS) {

		MHI_ERR("Not a valid ee for power on\n");

		MHI_CNTRL_ERR("Not a valid EE for power on:%s\n",

				TO_MHI_EXEC_STR(current_ee));

		ret = -EIO;

		goto error_bhi_offset;

	}
@@ -1001,7 +1007,7 @@ int mhi_async_power_up(struct mhi_controller *mhi_cntrl) 


	mutex_unlock(&mhi_cntrl->pm_mutex);



	MHI_LOG("Power on setup success\n");

	MHI_CNTRL_LOG("Power on setup success\n");



	return 0;
@@ -1026,14 +1032,14 @@ void mhi_control_error(struct mhi_controller *mhi_cntrl) 
	enum MHI_PM_STATE cur_state, transition_state;

	struct mhi_sfr_info *sfr_info = mhi_cntrl->mhi_sfr;



	MHI_LOG("Enter with pm_state:%s MHI_STATE:%s\n",

	MHI_CNTRL_LOG("Enter with pm_state:%s MHI_STATE:%s\n",

			to_mhi_pm_state_str(mhi_cntrl->pm_state),

			TO_MHI_STATE_STR(mhi_cntrl->dev_state));



	/* copy subsystem failure reason string if supported */

	if (sfr_info && sfr_info->buf_addr) {

		memcpy(sfr_info->str, sfr_info->buf_addr, sfr_info->len);

		pr_err("mhi: %s sfr: %s\n", mhi_cntrl->name,

		MHI_CNTRL_ERR("mhi:%s sfr: %s\n", mhi_cntrl->name,

				sfr_info->buf_addr);

	}
@@ -1047,7 +1053,7 @@ void mhi_control_error(struct mhi_controller *mhi_cntrl) 


	/* proceed if we move to device error or are already in error state */

	if (!MHI_PM_IN_ERROR_STATE(mhi_cntrl->pm_state)) {

		MHI_ERR("Failed to transition to state:%s from:%s\n",

		MHI_CNTRL_ERR("Failed to transition to state:%s from:%s\n",

				to_mhi_pm_state_str(transition_state),

				to_mhi_pm_state_str(cur_state));

		goto exit_control_error;
@@ -1062,7 +1068,7 @@ void mhi_control_error(struct mhi_controller *mhi_cntrl) 
	device_for_each_child(mhi_cntrl->dev, NULL, mhi_early_notify_device);



exit_control_error:

	MHI_LOG("Exit with pm_state:%s MHI_STATE:%s\n",

	MHI_CNTRL_LOG("Exit with pm_state:%s MHI_STATE:%s\n",

			to_mhi_pm_state_str(mhi_cntrl->pm_state),

			TO_MHI_STATE_STR(mhi_cntrl->dev_state));

}
@@ -1082,7 +1088,7 @@ void mhi_power_down(struct mhi_controller *mhi_cntrl, bool graceful) 
		cur_state = mhi_tryset_pm_state(mhi_cntrl,

						MHI_PM_LD_ERR_FATAL_DETECT);

		if (cur_state != MHI_PM_LD_ERR_FATAL_DETECT)

			MHI_ERR("Failed to move to state:%s from:%s\n",

			MHI_CNTRL_ERR("Failed to move to state:%s from:%s\n",

				to_mhi_pm_state_str(MHI_PM_LD_ERR_FATAL_DETECT),

				to_mhi_pm_state_str(mhi_cntrl->pm_state));

		transition_state = MHI_PM_SHUTDOWN_NO_ACCESS;
@@ -1093,7 +1099,7 @@ void mhi_power_down(struct mhi_controller *mhi_cntrl, bool graceful) 


	mhi_queue_disable_transition(mhi_cntrl, transition_state);



	MHI_LOG("Wait for shutdown to complete\n");

	MHI_CNTRL_LOG("Wait for shutdown to complete\n");

	flush_work(&mhi_cntrl->st_worker);



	mhi_deinit_debugfs(mhi_cntrl);
@@ -1704,7 +1710,7 @@ int mhi_force_rddm_mode(struct mhi_controller *mhi_cntrl) 
{

	int ret;



	MHI_LOG("Enter with pm_state:%s ee:%s\n",

	MHI_CNTRL_LOG("Enter with pm_state:%s ee:%s\n",

			to_mhi_pm_state_str(mhi_cntrl->pm_state),

			TO_MHI_EXEC_STR(mhi_cntrl->ee));
@@ -1712,17 +1718,17 @@ int mhi_force_rddm_mode(struct mhi_controller *mhi_cntrl) 
	if (mhi_cntrl->ee == MHI_EE_RDDM)

		return 0;



	MHI_LOG("Triggering SYS_ERR to force rddm state\n");

	MHI_CNTRL_LOG("Triggering SYS_ERR to force rddm state\n");

	mhi_set_mhi_state(mhi_cntrl, MHI_STATE_SYS_ERR);



	/* wait for rddm event */

	MHI_LOG("Waiting for device to enter RDDM state\n");

	MHI_CNTRL_LOG("Waiting for device to enter RDDM state\n");

	ret = wait_event_timeout(mhi_cntrl->state_event,

				 mhi_cntrl->ee == MHI_EE_RDDM,

				 msecs_to_jiffies(mhi_cntrl->timeout_ms));

	ret = ret ? 0 : -EIO;



	MHI_LOG("Exiting with pm_state:%s ee:%s ret:%d\n",

	MHI_CNTRL_LOG("Exiting with pm_state:%s ee:%s ret:%d\n",

			to_mhi_pm_state_str(mhi_cntrl->pm_state),

			TO_MHI_EXEC_STR(mhi_cntrl->ee), ret);