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Commit 7971c5d4 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "power: qpnp-qg: Do not round-up/down battery SOC in BASS"

parents 2e5aa99f 082b922a

drivers/power/supply/qcom/qg-core.h

+1 −0
Original line number Diff line number Diff line
@@ -64,6 +64,7 @@ struct qg_dt { 
	int			sys_min_volt_mv;

	int			fvss_vbat_mv;

	int			tcss_entry_soc;

	int			esr_low_temp_threshold;

	bool			hold_soc_while_full;

	bool			linearize_soc;

	bool			cl_disable;

drivers/power/supply/qcom/qg-soc.c

+3 −4
Original line number Diff line number Diff line
@@ -333,14 +333,13 @@ static int qg_process_tcss_soc(struct qpnp_qg *chip, int sys_soc) 
static int qg_process_bass_soc(struct qpnp_qg *chip, int sys_soc)

{

	int bass_soc = sys_soc, msoc = chip->msoc;

	int batt_soc = CAP(0, 100, DIV_ROUND_CLOSEST(chip->batt_soc, 100));



	if (!chip->dt.bass_enable && !(qg_ss_feature & QG_BASS))

		goto exit_soc_scale;



	qg_dbg(chip, QG_DEBUG_SOC, "BASS Entry: fifo_i=%d sys_soc=%d msoc=%d batt_soc=%d fvss_active=%d\n",

			chip->last_fifo_i_ua, sys_soc, msoc,

			batt_soc, chip->fvss_active);

			chip->batt_soc, chip->fvss_active);



	/* Skip BASS if FVSS is active */

	if (chip->fvss_active)
@@ -352,11 +351,11 @@ static int qg_process_bass_soc(struct qpnp_qg *chip, int sys_soc) 


	if (!chip->bass_active) {

		chip->bass_active = true;

		chip->bsoc_bass_entry = batt_soc;

		chip->bsoc_bass_entry = chip->batt_soc;

	}



	/* Drop the sys_soc by 1% if batt_soc has dropped */

	if ((chip->bsoc_bass_entry - batt_soc) >= 1) {

	if ((chip->bsoc_bass_entry - chip->batt_soc) >= 100) {

		bass_soc = (msoc > 0) ? msoc - 1 : 0;

		chip->bass_active = false;

	}

drivers/power/supply/qcom/qpnp-qg.c

+20 −1
Original line number Diff line number Diff line
@@ -1036,7 +1036,7 @@ static int qg_process_esr_data(struct qpnp_qg *chip) 


static int qg_esr_estimate(struct qpnp_qg *chip)

{

	int rc, i, ibat = 0;

	int rc, i, ibat = 0, temp = 0;

	u8 esr_done_count, reg0 = 0, reg1 = 0;

	bool is_charging = false;
@@ -1062,6 +1062,17 @@ static int qg_esr_estimate(struct qpnp_qg *chip) 
			!chip->dt.esr_discharge_enable)

		return 0;



	/* Ignore ESR if battery-temp is below a threshold */

	rc = qg_get_battery_temp(chip, &temp);

	if (rc < 0)

		return rc;

	if (temp < chip->dt.esr_low_temp_threshold) {

		qg_dbg(chip, QG_DEBUG_ESR,

			"Battery temperature(%d) below threshold(%d) for ESR\n",

				temp, chip->dt.esr_low_temp_threshold);

		return 0;

	}



	if (chip->batt_soc != INT_MIN && (chip->batt_soc <

					chip->dt.esr_disable_soc)) {

		qg_dbg(chip, QG_DEBUG_ESR,
@@ -4171,6 +4182,7 @@ static int qg_parse_cl_dt(struct qpnp_qg *chip) 
#define DEFAULT_SYS_MIN_VOLT_MV		2800

#define DEFAULT_FVSS_VBAT_MV		3500

#define DEFAULT_TCSS_ENTRY_SOC		90

#define DEFAULT_ESR_LOW_TEMP_THRESHOLD	100 /* 10 deg */

static int qg_parse_dt(struct qpnp_qg *chip)

{

	int rc = 0;
@@ -4358,6 +4370,13 @@ static int qg_parse_dt(struct qpnp_qg *chip) 
	else

		chip->dt.esr_min_ibat_ua = (int)temp;



	rc = of_property_read_u32(node, "qcom,esr-low-temp-threshold", &temp);

	if (rc < 0)

		chip->dt.esr_low_temp_threshold =

					DEFAULT_ESR_LOW_TEMP_THRESHOLD;

	else

		chip->dt.esr_low_temp_threshold = (int)temp;



	rc = of_property_read_u32(node, "qcom,shutdown_soc_threshold", &temp);

	if (rc < 0)

		chip->dt.shutdown_soc_threshold = -EINVAL;