drm/nouveau/instmem: namespace + nvidia gpu names (no binary change) (78b2b4e7) · Commits · e / devices / android_kernel_fairphone_FP5

drivers/gpu/drm/nouveau/include/nvkm/subdev/instmem.h

+15 −19

Original line number	Original line	Diff line number	Diff line
	#ifndef __NOUVEAU_INSTMEM_H__		#ifndef __NVKM_INSTMEM_H__
	#define __NOUVEAU_INSTMEM_H__		#define __NVKM_INSTMEM_H__

	#include <core/subdev.h>		#include <core/subdev.h>
	#include <core/device.h>
	#include <core/mm.h>

	struct nouveau_instobj {		struct nvkm_instobj {
	struct nouveau_object base;		struct nvkm_object base;
	struct list_head head;		struct list_head head;
	u32 *suspend;		u32 *suspend;
	u64 addr;		u64 addr;
	u32 size;		u32 size;
	};		};

	static inline struct nouveau_instobj *		static inline struct nvkm_instobj *
	nv_memobj(void *obj)		nv_memobj(void *obj)
	{		{
	#if CONFIG_NOUVEAU_DEBUG >= NV_DBG_PARANOIA		#if CONFIG_NOUVEAU_DEBUG >= NV_DBG_PARANOIA
	@@ -23,17 +20,17 @@ nv_memobj(void *obj)
	return obj;		return obj;
	}		}

	struct nouveau_instmem {		struct nvkm_instmem {
	struct nouveau_subdev base;		struct nvkm_subdev base;
	struct list_head list;		struct list_head list;

	u32 reserved;		u32 reserved;
	int (alloc)(struct nouveau_instmem , struct nouveau_object *,		int (alloc)(struct nvkm_instmem , struct nvkm_object *,
	u32 size, u32 align, struct nouveau_object **);		u32 size, u32 align, struct nvkm_object **);
	};		};

	static inline struct nouveau_instmem *		static inline struct nvkm_instmem *
	nouveau_instmem(void *obj)		nvkm_instmem(void *obj)
	{		{
	/* nv04/nv40 impls need to create objects in their constructor,		/* nv04/nv40 impls need to create objects in their constructor,
	* which is before the subdev pointer is valid		* which is before the subdev pointer is valid
	@@ -42,11 +39,10 @@ nouveau_instmem(void *obj)
	nv_subidx(obj) == NVDEV_SUBDEV_INSTMEM)		nv_subidx(obj) == NVDEV_SUBDEV_INSTMEM)
	return obj;		return obj;

	return (void *)nouveau_subdev(obj, NVDEV_SUBDEV_INSTMEM);		return (void *)nvkm_subdev(obj, NVDEV_SUBDEV_INSTMEM);
	}		}

	extern struct nouveau_oclass *nv04_instmem_oclass;		extern struct nvkm_oclass *nv04_instmem_oclass;
	extern struct nouveau_oclass *nv40_instmem_oclass;		extern struct nvkm_oclass *nv40_instmem_oclass;
	extern struct nouveau_oclass *nv50_instmem_oclass;		extern struct nvkm_oclass *nv50_instmem_oclass;

	#endif		#endif

drivers/gpu/drm/nouveau/nvkm/subdev/i2c/base.c

+1 −1

Original line number	Original line	Diff line number	Diff line
	@@ -34,7 +34,7 @@
	* interface to linux i2c bit-banging algorithm		* interface to linux i2c bit-banging algorithm
	*****************************************************************************/		*****************************************************************************/

	#ifdef CONFIG_NVKM_I2C_INTERNAL_DEFAULT		#ifdef CONFIG_NOUVEAU_I2C_INTERNAL_DEFAULT
	#define CSTMSEL true		#define CSTMSEL true
	#else		#else
	#define CSTMSEL false		#define CSTMSEL false

drivers/gpu/drm/nouveau/nvkm/subdev/i2c/bit.c

+1 −1

Original line number	Original line	Diff line number	Diff line
	@@ -23,7 +23,7 @@
	*/		*/
	#include "priv.h"		#include "priv.h"

	#ifdef CONFIG_NVKM_I2C_INTERNAL		#ifdef CONFIG_NOUVEAU_I2C_INTERNAL
	#define T_TIMEOUT 2200000		#define T_TIMEOUT 2200000
	#define T_RISEFALL 1000		#define T_RISEFALL 1000
	#define T_HOLD 5000		#define T_HOLD 5000

drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c

+32 −42

Original line number	Original line	Diff line number	Diff line
	@@ -21,37 +21,36 @@
	*		*
	* Authors: Ben Skeggs		* Authors: Ben Skeggs
	*/		*/

	#include "priv.h"		#include "priv.h"

			#include <core/engine.h>

	/******************************************************************************		/******************************************************************************
	* instmem object base implementation		* instmem object base implementation
	*****************************************************************************/		*****************************************************************************/

	void		void
	_nouveau_instobj_dtor(struct nouveau_object *object)		_nvkm_instobj_dtor(struct nvkm_object *object)
	{		{
	struct nouveau_instmem *imem = nouveau_instmem(object);		struct nvkm_instmem *imem = nvkm_instmem(object);
	struct nouveau_instobj iobj = (void )object;		struct nvkm_instobj iobj = (void )object;

	mutex_lock(&nv_subdev(imem)->mutex);		mutex_lock(&nv_subdev(imem)->mutex);
	list_del(&iobj->head);		list_del(&iobj->head);
	mutex_unlock(&nv_subdev(imem)->mutex);		mutex_unlock(&nv_subdev(imem)->mutex);

	return nouveau_object_destroy(&iobj->base);		return nvkm_object_destroy(&iobj->base);
	}		}

	int		int
	nouveau_instobj_create_(struct nouveau_object *parent,		nvkm_instobj_create_(struct nvkm_object parent, struct nvkm_object engine,
	struct nouveau_object *engine,		struct nvkm_oclass oclass, int length, void *pobject)
	struct nouveau_oclass *oclass,
	int length, void **pobject)
	{		{
	struct nouveau_instmem *imem = nouveau_instmem(parent);		struct nvkm_instmem *imem = nvkm_instmem(parent);
	struct nouveau_instobj *iobj;		struct nvkm_instobj *iobj;
	int ret;		int ret;

	ret = nouveau_object_create_(parent, engine, oclass, NV_MEMOBJ_CLASS,		ret = nvkm_object_create_(parent, engine, oclass, NV_MEMOBJ_CLASS,
	length, pobject);		length, pobject);
	iobj = *pobject;		iobj = *pobject;
	if (ret)		if (ret)
	@@ -68,26 +67,24 @@ nouveau_instobj_create_(struct nouveau_object *parent,
	*****************************************************************************/		*****************************************************************************/

	static int		static int
	nouveau_instmem_alloc(struct nouveau_instmem *imem,		nvkm_instmem_alloc(struct nvkm_instmem imem, struct nvkm_object parent,
	struct nouveau_object *parent, u32 size, u32 align,		u32 size, u32 align, struct nvkm_object **pobject)
	struct nouveau_object **pobject)
	{		{
	struct nouveau_instmem_impl impl = (void )imem->base.object.oclass;		struct nvkm_instmem_impl impl = (void )imem->base.object.oclass;
	struct nouveau_instobj_args args = { .size = size, .align = align };		struct nvkm_instobj_args args = { .size = size, .align = align };
	return nouveau_object_ctor(parent, &parent->engine->subdev.object,		return nvkm_object_ctor(parent, &parent->engine->subdev.object,
	impl->instobj, &args, sizeof(args), pobject);		impl->instobj, &args, sizeof(args), pobject);
	}		}

	int		int
	_nouveau_instmem_fini(struct nouveau_object *object, bool suspend)		_nvkm_instmem_fini(struct nvkm_object *object, bool suspend)
	{		{
	struct nouveau_instmem imem = (void )object;		struct nvkm_instmem imem = (void )object;
	struct nouveau_instobj *iobj;		struct nvkm_instobj *iobj;
	int i, ret = 0;		int i, ret = 0;

	if (suspend) {		if (suspend) {
	mutex_lock(&imem->base.mutex);		mutex_lock(&imem->base.mutex);

	list_for_each_entry(iobj, &imem->list, head) {		list_for_each_entry(iobj, &imem->list, head) {
	iobj->suspend = vmalloc(iobj->size);		iobj->suspend = vmalloc(iobj->size);
	if (!iobj->suspend) {		if (!iobj->suspend) {
	@@ -98,29 +95,26 @@ _nouveau_instmem_fini(struct nouveau_object *object, bool suspend)
	for (i = 0; i < iobj->size; i += 4)		for (i = 0; i < iobj->size; i += 4)
	iobj->suspend[i / 4] = nv_ro32(iobj, i);		iobj->suspend[i / 4] = nv_ro32(iobj, i);
	}		}

	mutex_unlock(&imem->base.mutex);		mutex_unlock(&imem->base.mutex);

	if (ret)		if (ret)
	return ret;		return ret;
	}		}

	return nouveau_subdev_fini(&imem->base, suspend);		return nvkm_subdev_fini(&imem->base, suspend);
	}		}

	int		int
	_nouveau_instmem_init(struct nouveau_object *object)		_nvkm_instmem_init(struct nvkm_object *object)
	{		{
	struct nouveau_instmem imem = (void )object;		struct nvkm_instmem imem = (void )object;
	struct nouveau_instobj *iobj;		struct nvkm_instobj *iobj;
	int ret, i;		int ret, i;

	ret = nouveau_subdev_init(&imem->base);		ret = nvkm_subdev_init(&imem->base);
	if (ret)		if (ret)
	return ret;		return ret;

	mutex_lock(&imem->base.mutex);		mutex_lock(&imem->base.mutex);

	list_for_each_entry(iobj, &imem->list, head) {		list_for_each_entry(iobj, &imem->list, head) {
	if (iobj->suspend) {		if (iobj->suspend) {
	for (i = 0; i < iobj->size; i += 4)		for (i = 0; i < iobj->size; i += 4)
	@@ -129,28 +123,24 @@ _nouveau_instmem_init(struct nouveau_object *object)
	iobj->suspend = NULL;		iobj->suspend = NULL;
	}		}
	}		}

	mutex_unlock(&imem->base.mutex);		mutex_unlock(&imem->base.mutex);

	return 0;		return 0;
	}		}

	int		int
	nouveau_instmem_create_(struct nouveau_object *parent,		nvkm_instmem_create_(struct nvkm_object parent, struct nvkm_object engine,
	struct nouveau_object *engine,		struct nvkm_oclass oclass, int length, void *pobject)
	struct nouveau_oclass *oclass,
	int length, void **pobject)
	{		{
	struct nouveau_instmem *imem;		struct nvkm_instmem *imem;
	int ret;		int ret;

	ret = nouveau_subdev_create_(parent, engine, oclass, 0,		ret = nvkm_subdev_create_(parent, engine, oclass, 0, "INSTMEM",
	"INSTMEM", "instmem", length, pobject);		"instmem", length, pobject);
	imem = *pobject;		imem = *pobject;
	if (ret)		if (ret)
	return ret;		return ret;

	INIT_LIST_HEAD(&imem->list);		INIT_LIST_HEAD(&imem->list);
	imem->alloc = nouveau_instmem_alloc;		imem->alloc = nvkm_instmem_alloc;
	return 0;		return 0;
	}		}

drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.c

+48 −47

Original line number	Original line	Diff line number	Diff line
	@@ -21,57 +21,58 @@
	*		*
	* Authors: Ben Skeggs		* Authors: Ben Skeggs
	*/		*/

	#include "nv04.h"		#include "nv04.h"

			#include <core/ramht.h>

	/******************************************************************************		/******************************************************************************
	* instmem object implementation		* instmem object implementation
	*****************************************************************************/		*****************************************************************************/

	static u32		static u32
	nv04_instobj_rd32(struct nouveau_object *object, u64 addr)		nv04_instobj_rd32(struct nvkm_object *object, u64 addr)
	{		{
	struct nv04_instmem_priv priv = (void )nouveau_instmem(object);		struct nv04_instmem_priv priv = (void )nvkm_instmem(object);
	struct nv04_instobj_priv node = (void )object;		struct nv04_instobj_priv node = (void )object;
	return nv_ro32(priv, node->mem->offset + addr);		return nv_ro32(priv, node->mem->offset + addr);
	}		}

	static void		static void
	nv04_instobj_wr32(struct nouveau_object *object, u64 addr, u32 data)		nv04_instobj_wr32(struct nvkm_object *object, u64 addr, u32 data)
	{		{
	struct nv04_instmem_priv priv = (void )nouveau_instmem(object);		struct nv04_instmem_priv priv = (void )nvkm_instmem(object);
	struct nv04_instobj_priv node = (void )object;		struct nv04_instobj_priv node = (void )object;
	nv_wo32(priv, node->mem->offset + addr, data);		nv_wo32(priv, node->mem->offset + addr, data);
	}		}

	static void		static void
	nv04_instobj_dtor(struct nouveau_object *object)		nv04_instobj_dtor(struct nvkm_object *object)
	{		{
	struct nv04_instmem_priv priv = (void )nouveau_instmem(object);		struct nv04_instmem_priv priv = (void )nvkm_instmem(object);
	struct nv04_instobj_priv node = (void )object;		struct nv04_instobj_priv node = (void )object;
	nouveau_mm_free(&priv->heap, &node->mem);		nvkm_mm_free(&priv->heap, &node->mem);
	nouveau_instobj_destroy(&node->base);		nvkm_instobj_destroy(&node->base);
	}		}

	static int		static int
	nv04_instobj_ctor(struct nouveau_object parent, struct nouveau_object engine,		nv04_instobj_ctor(struct nvkm_object parent, struct nvkm_object engine,
	struct nouveau_oclass oclass, void data, u32 size,		struct nvkm_oclass oclass, void data, u32 size,
	struct nouveau_object **pobject)		struct nvkm_object **pobject)
	{		{
	struct nv04_instmem_priv priv = (void )nouveau_instmem(parent);		struct nv04_instmem_priv priv = (void )nvkm_instmem(parent);
	struct nv04_instobj_priv *node;		struct nv04_instobj_priv *node;
	struct nouveau_instobj_args *args = data;		struct nvkm_instobj_args *args = data;
	int ret;		int ret;

	if (!args->align)		if (!args->align)
	args->align = 1;		args->align = 1;

	ret = nouveau_instobj_create(parent, engine, oclass, &node);		ret = nvkm_instobj_create(parent, engine, oclass, &node);
	*pobject = nv_object(node);		*pobject = nv_object(node);
	if (ret)		if (ret)
	return ret;		return ret;

	ret = nouveau_mm_head(&priv->heap, 0, 1, args->size, args->size,		ret = nvkm_mm_head(&priv->heap, 0, 1, args->size, args->size,
	args->align, &node->mem);		args->align, &node->mem);
	if (ret)		if (ret)
	return ret;		return ret;
	@@ -81,13 +82,13 @@ nv04_instobj_ctor(struct nouveau_object parent, struct nouveau_object engine,
	return 0;		return 0;
	}		}

	struct nouveau_instobj_impl		struct nvkm_instobj_impl
	nv04_instobj_oclass = {		nv04_instobj_oclass = {
	.base.ofuncs = &(struct nouveau_ofuncs) {		.base.ofuncs = &(struct nvkm_ofuncs) {
	.ctor = nv04_instobj_ctor,		.ctor = nv04_instobj_ctor,
	.dtor = nv04_instobj_dtor,		.dtor = nv04_instobj_dtor,
	.init = _nouveau_instobj_init,		.init = _nvkm_instobj_init,
	.fini = _nouveau_instobj_fini,		.fini = _nvkm_instobj_fini,
	.rd32 = nv04_instobj_rd32,		.rd32 = nv04_instobj_rd32,
	.wr32 = nv04_instobj_wr32,		.wr32 = nv04_instobj_wr32,
	},		},
	@@ -98,40 +99,40 @@ nv04_instobj_oclass = {
	*****************************************************************************/		*****************************************************************************/

	static u32		static u32
	nv04_instmem_rd32(struct nouveau_object *object, u64 addr)		nv04_instmem_rd32(struct nvkm_object *object, u64 addr)
	{		{
	return nv_rd32(object, 0x700000 + addr);		return nv_rd32(object, 0x700000 + addr);
	}		}

	static void		static void
	nv04_instmem_wr32(struct nouveau_object *object, u64 addr, u32 data)		nv04_instmem_wr32(struct nvkm_object *object, u64 addr, u32 data)
	{		{
	return nv_wr32(object, 0x700000 + addr, data);		return nv_wr32(object, 0x700000 + addr, data);
	}		}

	void		void
	nv04_instmem_dtor(struct nouveau_object *object)		nv04_instmem_dtor(struct nvkm_object *object)
	{		{
	struct nv04_instmem_priv priv = (void )object;		struct nv04_instmem_priv priv = (void )object;
	nouveau_gpuobj_ref(NULL, &priv->ramfc);		nvkm_gpuobj_ref(NULL, &priv->ramfc);
	nouveau_gpuobj_ref(NULL, &priv->ramro);		nvkm_gpuobj_ref(NULL, &priv->ramro);
	nouveau_ramht_ref(NULL, &priv->ramht);		nvkm_ramht_ref(NULL, &priv->ramht);
	nouveau_gpuobj_ref(NULL, &priv->vbios);		nvkm_gpuobj_ref(NULL, &priv->vbios);
	nouveau_mm_fini(&priv->heap);		nvkm_mm_fini(&priv->heap);
	if (priv->iomem)		if (priv->iomem)
	iounmap(priv->iomem);		iounmap(priv->iomem);
	nouveau_instmem_destroy(&priv->base);		nvkm_instmem_destroy(&priv->base);
	}		}

	static int		static int
	nv04_instmem_ctor(struct nouveau_object parent, struct nouveau_object engine,		nv04_instmem_ctor(struct nvkm_object parent, struct nvkm_object engine,
	struct nouveau_oclass oclass, void data, u32 size,		struct nvkm_oclass oclass, void data, u32 size,
	struct nouveau_object **pobject)		struct nvkm_object **pobject)
	{		{
	struct nv04_instmem_priv *priv;		struct nv04_instmem_priv *priv;
	int ret;		int ret;

	ret = nouveau_instmem_create(parent, engine, oclass, &priv);		ret = nvkm_instmem_create(parent, engine, oclass, &priv);
	*pobject = nv_object(priv);		*pobject = nv_object(priv);
	if (ret)		if (ret)
	return ret;		return ret;
	@@ -139,29 +140,29 @@ nv04_instmem_ctor(struct nouveau_object parent, struct nouveau_object engine,
	/* PRAMIN aperture maps over the end of VRAM, reserve it */		/* PRAMIN aperture maps over the end of VRAM, reserve it */
	priv->base.reserved = 512 * 1024;		priv->base.reserved = 512 * 1024;

	ret = nouveau_mm_init(&priv->heap, 0, priv->base.reserved, 1);		ret = nvkm_mm_init(&priv->heap, 0, priv->base.reserved, 1);
	if (ret)		if (ret)
	return ret;		return ret;

	/* 0x00000-0x10000: reserve for probable vbios image */		/* 0x00000-0x10000: reserve for probable vbios image */
	ret = nouveau_gpuobj_new(nv_object(priv), NULL, 0x10000, 0, 0,		ret = nvkm_gpuobj_new(nv_object(priv), NULL, 0x10000, 0, 0,
	&priv->vbios);		&priv->vbios);
	if (ret)		if (ret)
	return ret;		return ret;

	/* 0x10000-0x18000: reserve for RAMHT */		/* 0x10000-0x18000: reserve for RAMHT */
	ret = nouveau_ramht_new(nv_object(priv), NULL, 0x08000, 0, &priv->ramht);		ret = nvkm_ramht_new(nv_object(priv), NULL, 0x08000, 0, &priv->ramht);
	if (ret)		if (ret)
	return ret;		return ret;

	/* 0x18000-0x18800: reserve for RAMFC (enough for 32 nv30 channels) */		/* 0x18000-0x18800: reserve for RAMFC (enough for 32 nv30 channels) */
	ret = nouveau_gpuobj_new(nv_object(priv), NULL, 0x00800, 0,		ret = nvkm_gpuobj_new(nv_object(priv), NULL, 0x00800, 0,
	NVOBJ_FLAG_ZERO_ALLOC, &priv->ramfc);		NVOBJ_FLAG_ZERO_ALLOC, &priv->ramfc);
	if (ret)		if (ret)
	return ret;		return ret;

	/* 0x18800-0x18a00: reserve for RAMRO */		/* 0x18800-0x18a00: reserve for RAMRO */
	ret = nouveau_gpuobj_new(nv_object(priv), NULL, 0x00200, 0, 0,		ret = nvkm_gpuobj_new(nv_object(priv), NULL, 0x00200, 0, 0,
	&priv->ramro);		&priv->ramro);
	if (ret)		if (ret)
	return ret;		return ret;
	@@ -169,14 +170,14 @@ nv04_instmem_ctor(struct nouveau_object parent, struct nouveau_object engine,
	return 0;		return 0;
	}		}

	struct nouveau_oclass *		struct nvkm_oclass *
	nv04_instmem_oclass = &(struct nouveau_instmem_impl) {		nv04_instmem_oclass = &(struct nvkm_instmem_impl) {
	.base.handle = NV_SUBDEV(INSTMEM, 0x04),		.base.handle = NV_SUBDEV(INSTMEM, 0x04),
	.base.ofuncs = &(struct nouveau_ofuncs) {		.base.ofuncs = &(struct nvkm_ofuncs) {
	.ctor = nv04_instmem_ctor,		.ctor = nv04_instmem_ctor,
	.dtor = nv04_instmem_dtor,		.dtor = nv04_instmem_dtor,
	.init = _nouveau_instmem_init,		.init = _nvkm_instmem_init,
	.fini = _nouveau_instmem_fini,		.fini = _nvkm_instmem_fini,
	.rd32 = nv04_instmem_rd32,		.rd32 = nv04_instmem_rd32,
	.wr32 = nv04_instmem_wr32,		.wr32 = nv04_instmem_wr32,
	},		},