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Commit 782e85c5 authored by Sergei Shtylyov's avatar Sergei Shtylyov Committed by David S. Miller
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sh_eth: fix *enum* {A|M}PR_BIT 



The *enum* {A|M}PR_BIT were declared in the commit 86a74ff2 ("net:
sh_eth: add support for  Renesas SuperH Ethernet") adding SH771x support,
however the SH771x manual  doesn't have the APR/MPR registers described
and the code writing to them for SH7710 was later removed by the commit
380af9e3 ("net: sh_eth: CPU dependency code collect to "struct
sh_eth_cpu_data""). All the newer SoC manuals have these registers
documented as having a 16-bit TIME parameter of the PAUSE frame, not
1-bit -- update the *enum* accordingly, fixing up the APR/MPR writes...

Signed-off-by: default avatarSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 5092ad4d

drivers/net/ethernet/renesas/sh_eth.c

+2 −2
Original line number Diff line number Diff line
@@ -1521,9 +1521,9 @@ static int sh_eth_dev_init(struct net_device *ndev) 


	/* mask reset */

	if (mdp->cd->apr)

		sh_eth_write(ndev, APR_AP, APR);

		sh_eth_write(ndev, 1, APR);

	if (mdp->cd->mpr)

		sh_eth_write(ndev, MPR_MP, MPR);

		sh_eth_write(ndev, 1, MPR);

	if (mdp->cd->tpauser)

		sh_eth_write(ndev, TPAUSER_UNLIMITED, TPAUSER);

drivers/net/ethernet/renesas/sh_eth.h

+2 −2
Original line number Diff line number Diff line
@@ -383,12 +383,12 @@ enum ECSIPR_STATUS_MASK_BIT { 


/* APR */

enum APR_BIT {

	APR_AP = 0x00000001,

	APR_AP = 0x0000ffff,

};



/* MPR */

enum MPR_BIT {

	MPR_MP = 0x00000001,

	MPR_MP = 0x0000ffff,

};



/* TRSCER */