Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 77c1044f authored by Murali Nalajala's avatar Murali Nalajala
Browse files

ARM: dts: qcom: Update trusted vm DT entries 

Update below DT entries based on testing on the target.
 - Move memory node outside of vm-config node and provide
   static S2 mappings until VMM is ready.
 - Update chosen node to support initramfs functionality.
 - Remove interrupt controller reference from arch_timer.

Change-Id: Id59aa9e21cdc356e3664ebb4323c3ecefb9f1f3c
parent c0384438

qcom/trustedvm.dtsi

+11 −3
Original line number Diff line number Diff line
@@ -6,6 +6,10 @@ 
	interrupt-parent = <&vgic>;



	chosen {

		bootargs = "root=/dev/ram rw init=/init console=hvc0 loglevel=8";

		linux,initrd-start = <0x2a900000>;

		linux,initrd-end = <0x2b42171a>; /* 11 MB */

		kaslr-seed = <0xfeedbeef 0xc0def00d>;

	};



	cpus {
@@ -21,7 +25,7 @@ 
		};

	};



	vgic: interrupt-controller {

	vgic: interrupt-controller@17a00000 {

		compatible = "arm,gic-v3";

		interrupt-controller;

		#interrupt-cells = <0x3>;
@@ -34,6 +38,11 @@ 
		method = "smc";

	};



	memory@28000000 {

		device_type = "memory";

		reg = <0x0 0x28000000 0x0 0x8000000>; /* Temp S2 mapping */

	};



	qcom,vm-config {

		compatible = "qcom,vm-1.0";

		vm-type = "aarch64-guest";
@@ -73,13 +82,12 @@ 
		};

	};



	timer {

	arch_timer: timer {

		compatible = "arm,armv8-timer";

		always-on;

		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,

			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,

			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,

			     <GIC_PPI 12 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;

		interrupt-parent = <&vgic>;

	};

};