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Commit 77a2faa5 authored by Christian König's avatar Christian König Committed by Alex Deucher
Browse files

drm/amdgpu: fix up GDS/GWS/OA shifting



That only worked by pure coincident. Completely remove the shifting and
always apply correct PAGE_SHIFT.

Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 403009bf
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+6 −6
Original line number Diff line number Diff line
@@ -721,16 +721,16 @@ static int amdgpu_cs_parser_bos(struct amdgpu_cs_parser *p,
		e->bo_va = amdgpu_vm_bo_find(vm, ttm_to_amdgpu_bo(e->tv.bo));

	if (gds) {
		p->job->gds_base = amdgpu_bo_gpu_offset(gds);
		p->job->gds_size = amdgpu_bo_size(gds);
		p->job->gds_base = amdgpu_bo_gpu_offset(gds) >> PAGE_SHIFT;
		p->job->gds_size = amdgpu_bo_size(gds) >> PAGE_SHIFT;
	}
	if (gws) {
		p->job->gws_base = amdgpu_bo_gpu_offset(gws);
		p->job->gws_size = amdgpu_bo_size(gws);
		p->job->gws_base = amdgpu_bo_gpu_offset(gws) >> PAGE_SHIFT;
		p->job->gws_size = amdgpu_bo_size(gws) >> PAGE_SHIFT;
	}
	if (oa) {
		p->job->oa_base = amdgpu_bo_gpu_offset(oa);
		p->job->oa_size = amdgpu_bo_size(oa);
		p->job->oa_base = amdgpu_bo_gpu_offset(oa) >> PAGE_SHIFT;
		p->job->oa_size = amdgpu_bo_size(oa) >> PAGE_SHIFT;
	}

	if (!r && p->uf_entry.tv.bo) {
+0 −7
Original line number Diff line number Diff line
@@ -24,13 +24,6 @@
#ifndef __AMDGPU_GDS_H__
#define __AMDGPU_GDS_H__

/* Because TTM request that alloacted buffer should be PAGE_SIZE aligned,
 * we should report GDS/GWS/OA size as PAGE_SIZE aligned
 * */
#define AMDGPU_GDS_SHIFT	2
#define AMDGPU_GWS_SHIFT	PAGE_SHIFT
#define AMDGPU_OA_SHIFT		PAGE_SHIFT

struct amdgpu_ring;
struct amdgpu_bo;

+3 −9
Original line number Diff line number Diff line
@@ -244,16 +244,10 @@ int amdgpu_gem_create_ioctl(struct drm_device *dev, void *data,
			return -EINVAL;
		}
		flags |= AMDGPU_GEM_CREATE_NO_CPU_ACCESS;
		if (args->in.domains == AMDGPU_GEM_DOMAIN_GDS)
			size = size << AMDGPU_GDS_SHIFT;
		else if (args->in.domains == AMDGPU_GEM_DOMAIN_GWS)
			size = size << AMDGPU_GWS_SHIFT;
		else if (args->in.domains == AMDGPU_GEM_DOMAIN_OA)
			size = size << AMDGPU_OA_SHIFT;
		else
			return -EINVAL;
		/* GDS allocations must be DW aligned */
		if (args->in.domains & AMDGPU_GEM_DOMAIN_GDS)
			size = ALIGN(size, 4);
	}
	size = roundup(size, PAGE_SIZE);

	if (flags & AMDGPU_GEM_CREATE_VM_ALWAYS_VALID) {
		r = amdgpu_bo_reserve(vm->root.base.bo, false);
+7 −7
Original line number Diff line number Diff line
@@ -528,13 +528,13 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
		struct drm_amdgpu_info_gds gds_info;

		memset(&gds_info, 0, sizeof(gds_info));
		gds_info.gds_gfx_partition_size = adev->gds.mem.gfx_partition_size >> AMDGPU_GDS_SHIFT;
		gds_info.compute_partition_size = adev->gds.mem.cs_partition_size >> AMDGPU_GDS_SHIFT;
		gds_info.gds_total_size = adev->gds.mem.total_size >> AMDGPU_GDS_SHIFT;
		gds_info.gws_per_gfx_partition = adev->gds.gws.gfx_partition_size >> AMDGPU_GWS_SHIFT;
		gds_info.gws_per_compute_partition = adev->gds.gws.cs_partition_size >> AMDGPU_GWS_SHIFT;
		gds_info.oa_per_gfx_partition = adev->gds.oa.gfx_partition_size >> AMDGPU_OA_SHIFT;
		gds_info.oa_per_compute_partition = adev->gds.oa.cs_partition_size >> AMDGPU_OA_SHIFT;
		gds_info.gds_gfx_partition_size = adev->gds.mem.gfx_partition_size;
		gds_info.compute_partition_size = adev->gds.mem.cs_partition_size;
		gds_info.gds_total_size = adev->gds.mem.total_size;
		gds_info.gws_per_gfx_partition = adev->gds.gws.gfx_partition_size;
		gds_info.gws_per_compute_partition = adev->gds.gws.cs_partition_size;
		gds_info.oa_per_gfx_partition = adev->gds.oa.gfx_partition_size;
		gds_info.oa_per_compute_partition = adev->gds.oa.cs_partition_size;
		return copy_to_user(out, &gds_info,
				    min((size_t)size, sizeof(gds_info))) ? -EFAULT : 0;
	}
+5 −1
Original line number Diff line number Diff line
@@ -427,6 +427,10 @@ static int amdgpu_bo_do_create(struct amdgpu_device *adev,
	int r;

	page_align = roundup(bp->byte_align, PAGE_SIZE) >> PAGE_SHIFT;
	if (bp->domain & (AMDGPU_GEM_DOMAIN_GDS | AMDGPU_GEM_DOMAIN_GWS |
			  AMDGPU_GEM_DOMAIN_OA))
		size <<= PAGE_SHIFT;
	else
		size = ALIGN(size, PAGE_SIZE);

	if (!amdgpu_bo_validate_size(adev, size, bp->domain))
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