Loading qcom/qrb2210-rb1-idp.dtsi +36 −0 Original line number Diff line number Diff line Loading @@ -12,6 +12,42 @@ }; }; &sdhc_1 { vdd-supply = <&L20A>; qcom,vdd-voltage-level = <2856000 2856000>; qcom,vdd-current-level = <0 570000>; vdd-io-supply = <&L14A>; qcom,vdd-io-always-on; qcom,vdd-io-lpm-sup; qcom,vdd-io-voltage-level = <1800000 1800000>; qcom,vdd-io-current-level = <0 325000>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&sdc1_on>; pinctrl-1 = <&sdc1_off>; status = "ok"; }; &sdhc_2 { vdd-supply = <&L21A>; qcom,vdd-voltage-level = <2960000 3300000>; qcom,vdd-current-level = <0 800000>; vdd-io-supply = <&L4A>; qcom,vdd-io-voltage-level = <1800000 2960000>; qcom,vdd-io-current-level = <0 22000>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&sdc2_on>; pinctrl-1 = <&sdc2_off>; cd-gpios = <&tlmm 88 GPIO_ACTIVE_LOW>; status = "ok"; }; &pm2250_qg { qcom,battery-data = <&scuba_batterydata>; qcom,qg-iterm-ma = <150>; Loading qcom/qrb2210-rb1-pinctrl.dtsi +58 −92 Original line number Diff line number Diff line Loading @@ -37,139 +37,105 @@ }; }; /* SDC pin type */ sdc1_clk_on: sdc1_clk_on { config { pins = "sdc1_clk"; bias-disable; /* NO pull */ drive-strength = <16>; /* 16 MA */ }; }; sdc1_clk_off: sdc1_clk_off { config { sdc1_on: sdc1_on { clk { pins = "sdc1_clk"; bias-disable; /* NO pull */ drive-strength = <2>; /* 2 MA */ }; }; sdc1_cmd_on: sdc1_cmd_on { config { pins = "sdc1_cmd"; bias-pull-up; /* pull up */ drive-strength = <14>; /* 14 MA */ }; bias-disable; drive-strength = <16>; }; sdc1_cmd_off: sdc1_cmd_off { config { cmd { pins = "sdc1_cmd"; bias-pull-up; /* pull up */ drive-strength = <2>; /* 2 MA */ }; }; sdc1_data_on: sdc1_data_on { config { pins = "sdc1_data"; bias-pull-up; /* pull up */ drive-strength = <14>; /* 14 MA */ }; bias-pull-up; drive-strength = <10>; }; sdc1_data_off: sdc1_data_off { config { data { pins = "sdc1_data"; bias-pull-up; /* pull up */ drive-strength = <2>; /* 2 MA */ }; bias-pull-up; drive-strength = <10>; }; sdc1_rclk_on: sdc1_rclk_on { config { rclk { pins = "sdc1_rclk"; bias-pull-down; /* pull down */ bias-pull-down; }; }; sdc1_rclk_off: sdc1_rclk_off { config { pins = "sdc1_rclk"; bias-pull-down; /* pull down */ }; sdc1_off: sdc1_off { clk { pins = "sdc1_clk"; bias-disable; drive-strength = <2>; }; sdc2_clk_on: sdc2_clk_on { config { pins = "sdc2_clk"; bias-disable; /* NO pull */ drive-strength = <16>; /* 16 MA */ cmd { pins = "sdc1_cmd"; bias-pull-up; drive-strength = <2>; }; data { pins = "sdc1_data"; bias-pull-up; drive-strength = <2>; }; sdc2_clk_off: sdc2_clk_off { config { pins = "sdc2_clk"; bias-disable; /* NO pull */ drive-strength = <2>; /* 2 MA */ rclk { pins = "sdc1_rclk"; bias-pull-down; }; }; sdc2_cmd_on: sdc2_cmd_on { config { pins = "sdc2_cmd"; bias-pull-up; /* pull up */ drive-strength = <14>; /* 14 MA */ }; sdc2_on: sdc2_on { clk { pins = "sdc2_clk"; bias-disable; drive-strength = <16>; }; sdc2_cmd_off: sdc2_cmd_off { config { cmd { pins = "sdc2_cmd"; bias-pull-up; /* pull up */ drive-strength = <2>; /* 2 MA */ }; bias-pull-up; drive-strength = <10>; }; sdc2_data_on: sdc2_data_on { config { data { pins = "sdc2_data"; bias-pull-up; /* pull up */ drive-strength = <14>; /* 14 MA */ }; bias-pull-up; drive-strength = <10>; }; sdc2_data_off: sdc2_data_off { config { pins = "sdc2_data"; bias-pull-up; /* pull up */ drive-strength = <2>; /* 2 MA */ sd-cd { pins = "gpio88"; bias-pull-up; drive-strength = <2>; }; }; sdc2_cd_on: cd_on { mux { pins = "gpio88"; function = "gpio"; sdc2_off: sdc2_off { clk { pins = "sdc2_clk"; bias-disable; drive-strength = <2>; }; config { pins = "gpio88"; drive-strength = <2>; cmd { pins = "sdc2_cmd"; bias-pull-up; }; drive-strength = <2>; }; sdc2_cd_off: cd_off { mux { pins = "gpio88"; function = "gpio"; data { pins = "sdc2_data"; bias-pull-up; drive-strength = <2>; }; config { sd-cd { pins = "gpio88"; drive-strength = <2>; bias-disable; drive-strength = <2>; }; }; Loading qcom/qrb2210-rb1.dtsi +152 −0 Original line number Diff line number Diff line Loading @@ -31,6 +31,8 @@ aliases { serial0 = &qupv3_se4_2uart; hsuart0 = &qupv3_se3_4uart; sdhc1 = &sdhc_1; /*SDC1 eMMC slot*/ sdhc2 = &sdhc_2; /* SDC2 SD card slot */ }; cpus { Loading Loading @@ -487,6 +489,156 @@ thermal_zones: thermal-zones { }; sdhc_1: sdhci@4744000 { compatible = "qcom,sdhci-msm-v5"; reg = <0x04744000 0x1000>, <0x04745000 0x1000>; reg-names = "hc_mem", "cqhci_mem"; iommus = <&apps_smmu 0xC0 0x0>; qcom,iommu-dma = "bypass"; interrupts = <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "hc_irq", "pwr_irq"; clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>, <&gcc GCC_SDCC1_ICE_CORE_CLK>; clock-names = "core", "iface", "ice_core"; qcom,ice-clk-rates = <300000000 100000000>; interconnects = <&system_noc MASTER_SDCC_1 &bimc SLAVE_EBI_CH0>, <&bimc MASTER_AMPSS_M0 &config_noc SLAVE_SDCC_1>; interconnect-names = "sdhc-ddr","cpu-sdhc"; qcom,msm-bus,name = "sdhc1"; qcom,msm-bus,num-cases = <9>; qcom,msm-bus,num-paths = <2>; qcom,msm-bus,vectors-KBps = /* No vote */ <78 512 0 0>, <1 606 0 0>, /* 400 KB/s*/ <78 512 1046 1600>, <1 606 1600 1600>, /* 20 MB/s */ <78 512 20480 80000>, <1 606 80000 80000>, /* 25 MB/s */ <78 512 25600 250000>, <1 606 50000 133320>, /* 50 MB/s */ <78 512 51200 250000>, <1 606 65000 133320>, /* 100 MB/s */ <78 512 102400 250000>, <1 606 65000 133320>, /* 200 MB/s */ <78 512 204800 800000>, <1 606 200000 300000>, /* 400 MB/s */ <78 512 204800 800000>, <1 606 200000 300000>, /* Max. bandwidth */ <78 512 1338562 4096000>, <1 606 1338562 4096000>; qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000 100750000 200000000 400000000 4294967295>; /* DLL HSR settings. Refer go/hsr - <Target> DLL settings */ qcom,dll-hsr-list = <0x000f642c 0x0 0x0 0x00010800 0x80040868>; mmc-ddr-1_8v; mmc-hs200-1_8v; mmc-hs400-1_8v; mmc-hs400-enhanced-strobe; bus-width = <8>; non-removable; supports-cqe; no-sd; no-sdio; max-frequency = <192000000>; qcom,devfreq,freq-table = <50000000 200000000>; qcom,scaling-lower-bus-speed-mode = "DDR52"; status = "disabled"; qos0 { mask = <0x0f>; vote = <43>; }; }; sdhc_2: sdhci@4784000 { compatible = "qcom,sdhci-msm-v5"; reg = <0x4784000 0x1000>; reg-names = "hc_mem"; interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "hc_irq", "pwr_irq"; clocks = <&gcc GCC_SDCC2_AHB_CLK>, <&gcc GCC_SDCC2_APPS_CLK>; clock-names = "core", "iface"; interconnects = <&system_noc MASTER_SDCC_2 &bimc SLAVE_EBI_CH0>, <&bimc MASTER_AMPSS_M0 &config_noc SLAVE_SDCC_2>; interconnect-names = "sdhc-ddr","cpu-sdhc"; qcom,msm-bus,name = "sdhc2"; qcom,msm-bus,num-cases = <8>; qcom,msm-bus,num-paths = <2>; qcom,msm-bus,vectors-KBps = /* No vote */ <81 512 0 0>, <1 608 0 0>, /* 400 KB/s*/ <81 512 1046 3200>, <1 608 1600 1600>, /* 20 MB/s */ <81 512 52286 250000>, <1 608 80000 133320>, /* 25 MB/s */ <81 512 65360 250000>, <1 608 100000 133320>, /* 50 MB/s */ <81 512 130718 250000>, <1 608 133320 133320>, /* 100 MB/s */ <81 512 261438 250000>, <1 608 150000 133320>, /* 200 MB/s */ <81 512 261438 800000>, <1 608 300000 300000>, /* Max. bandwidth */ <81 512 1338562 4096000>, <1 608 1338562 4096000>; qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000 100750000 200000000 4294967295>; /* DLL HSR settings. Refer go/hsr - <Target> DLL settings */ qcom,dll-hsr-list = <0x0007642c 0x0 0x0 0x00010800 0x80040868>; bus-width = <4>; iommus = <&apps_smmu 0xA0 0x0>; qcom,iommu-dma = "bypass"; no-mmc; no-sdio; max-frequency = <202000000>; qcom,devfreq,freq-table = <50000000 202000000>; status = "disabled"; qos0 { mask = <0x0f>; vote = <43>; }; }; qfprom: qfprom@1b40000 { compatible = "qcom,qfprom"; reg = <0x1b40000 0x7000>; Loading Loading
qcom/qrb2210-rb1-idp.dtsi +36 −0 Original line number Diff line number Diff line Loading @@ -12,6 +12,42 @@ }; }; &sdhc_1 { vdd-supply = <&L20A>; qcom,vdd-voltage-level = <2856000 2856000>; qcom,vdd-current-level = <0 570000>; vdd-io-supply = <&L14A>; qcom,vdd-io-always-on; qcom,vdd-io-lpm-sup; qcom,vdd-io-voltage-level = <1800000 1800000>; qcom,vdd-io-current-level = <0 325000>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&sdc1_on>; pinctrl-1 = <&sdc1_off>; status = "ok"; }; &sdhc_2 { vdd-supply = <&L21A>; qcom,vdd-voltage-level = <2960000 3300000>; qcom,vdd-current-level = <0 800000>; vdd-io-supply = <&L4A>; qcom,vdd-io-voltage-level = <1800000 2960000>; qcom,vdd-io-current-level = <0 22000>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&sdc2_on>; pinctrl-1 = <&sdc2_off>; cd-gpios = <&tlmm 88 GPIO_ACTIVE_LOW>; status = "ok"; }; &pm2250_qg { qcom,battery-data = <&scuba_batterydata>; qcom,qg-iterm-ma = <150>; Loading
qcom/qrb2210-rb1-pinctrl.dtsi +58 −92 Original line number Diff line number Diff line Loading @@ -37,139 +37,105 @@ }; }; /* SDC pin type */ sdc1_clk_on: sdc1_clk_on { config { pins = "sdc1_clk"; bias-disable; /* NO pull */ drive-strength = <16>; /* 16 MA */ }; }; sdc1_clk_off: sdc1_clk_off { config { sdc1_on: sdc1_on { clk { pins = "sdc1_clk"; bias-disable; /* NO pull */ drive-strength = <2>; /* 2 MA */ }; }; sdc1_cmd_on: sdc1_cmd_on { config { pins = "sdc1_cmd"; bias-pull-up; /* pull up */ drive-strength = <14>; /* 14 MA */ }; bias-disable; drive-strength = <16>; }; sdc1_cmd_off: sdc1_cmd_off { config { cmd { pins = "sdc1_cmd"; bias-pull-up; /* pull up */ drive-strength = <2>; /* 2 MA */ }; }; sdc1_data_on: sdc1_data_on { config { pins = "sdc1_data"; bias-pull-up; /* pull up */ drive-strength = <14>; /* 14 MA */ }; bias-pull-up; drive-strength = <10>; }; sdc1_data_off: sdc1_data_off { config { data { pins = "sdc1_data"; bias-pull-up; /* pull up */ drive-strength = <2>; /* 2 MA */ }; bias-pull-up; drive-strength = <10>; }; sdc1_rclk_on: sdc1_rclk_on { config { rclk { pins = "sdc1_rclk"; bias-pull-down; /* pull down */ bias-pull-down; }; }; sdc1_rclk_off: sdc1_rclk_off { config { pins = "sdc1_rclk"; bias-pull-down; /* pull down */ }; sdc1_off: sdc1_off { clk { pins = "sdc1_clk"; bias-disable; drive-strength = <2>; }; sdc2_clk_on: sdc2_clk_on { config { pins = "sdc2_clk"; bias-disable; /* NO pull */ drive-strength = <16>; /* 16 MA */ cmd { pins = "sdc1_cmd"; bias-pull-up; drive-strength = <2>; }; data { pins = "sdc1_data"; bias-pull-up; drive-strength = <2>; }; sdc2_clk_off: sdc2_clk_off { config { pins = "sdc2_clk"; bias-disable; /* NO pull */ drive-strength = <2>; /* 2 MA */ rclk { pins = "sdc1_rclk"; bias-pull-down; }; }; sdc2_cmd_on: sdc2_cmd_on { config { pins = "sdc2_cmd"; bias-pull-up; /* pull up */ drive-strength = <14>; /* 14 MA */ }; sdc2_on: sdc2_on { clk { pins = "sdc2_clk"; bias-disable; drive-strength = <16>; }; sdc2_cmd_off: sdc2_cmd_off { config { cmd { pins = "sdc2_cmd"; bias-pull-up; /* pull up */ drive-strength = <2>; /* 2 MA */ }; bias-pull-up; drive-strength = <10>; }; sdc2_data_on: sdc2_data_on { config { data { pins = "sdc2_data"; bias-pull-up; /* pull up */ drive-strength = <14>; /* 14 MA */ }; bias-pull-up; drive-strength = <10>; }; sdc2_data_off: sdc2_data_off { config { pins = "sdc2_data"; bias-pull-up; /* pull up */ drive-strength = <2>; /* 2 MA */ sd-cd { pins = "gpio88"; bias-pull-up; drive-strength = <2>; }; }; sdc2_cd_on: cd_on { mux { pins = "gpio88"; function = "gpio"; sdc2_off: sdc2_off { clk { pins = "sdc2_clk"; bias-disable; drive-strength = <2>; }; config { pins = "gpio88"; drive-strength = <2>; cmd { pins = "sdc2_cmd"; bias-pull-up; }; drive-strength = <2>; }; sdc2_cd_off: cd_off { mux { pins = "gpio88"; function = "gpio"; data { pins = "sdc2_data"; bias-pull-up; drive-strength = <2>; }; config { sd-cd { pins = "gpio88"; drive-strength = <2>; bias-disable; drive-strength = <2>; }; }; Loading
qcom/qrb2210-rb1.dtsi +152 −0 Original line number Diff line number Diff line Loading @@ -31,6 +31,8 @@ aliases { serial0 = &qupv3_se4_2uart; hsuart0 = &qupv3_se3_4uart; sdhc1 = &sdhc_1; /*SDC1 eMMC slot*/ sdhc2 = &sdhc_2; /* SDC2 SD card slot */ }; cpus { Loading Loading @@ -487,6 +489,156 @@ thermal_zones: thermal-zones { }; sdhc_1: sdhci@4744000 { compatible = "qcom,sdhci-msm-v5"; reg = <0x04744000 0x1000>, <0x04745000 0x1000>; reg-names = "hc_mem", "cqhci_mem"; iommus = <&apps_smmu 0xC0 0x0>; qcom,iommu-dma = "bypass"; interrupts = <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "hc_irq", "pwr_irq"; clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>, <&gcc GCC_SDCC1_ICE_CORE_CLK>; clock-names = "core", "iface", "ice_core"; qcom,ice-clk-rates = <300000000 100000000>; interconnects = <&system_noc MASTER_SDCC_1 &bimc SLAVE_EBI_CH0>, <&bimc MASTER_AMPSS_M0 &config_noc SLAVE_SDCC_1>; interconnect-names = "sdhc-ddr","cpu-sdhc"; qcom,msm-bus,name = "sdhc1"; qcom,msm-bus,num-cases = <9>; qcom,msm-bus,num-paths = <2>; qcom,msm-bus,vectors-KBps = /* No vote */ <78 512 0 0>, <1 606 0 0>, /* 400 KB/s*/ <78 512 1046 1600>, <1 606 1600 1600>, /* 20 MB/s */ <78 512 20480 80000>, <1 606 80000 80000>, /* 25 MB/s */ <78 512 25600 250000>, <1 606 50000 133320>, /* 50 MB/s */ <78 512 51200 250000>, <1 606 65000 133320>, /* 100 MB/s */ <78 512 102400 250000>, <1 606 65000 133320>, /* 200 MB/s */ <78 512 204800 800000>, <1 606 200000 300000>, /* 400 MB/s */ <78 512 204800 800000>, <1 606 200000 300000>, /* Max. bandwidth */ <78 512 1338562 4096000>, <1 606 1338562 4096000>; qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000 100750000 200000000 400000000 4294967295>; /* DLL HSR settings. Refer go/hsr - <Target> DLL settings */ qcom,dll-hsr-list = <0x000f642c 0x0 0x0 0x00010800 0x80040868>; mmc-ddr-1_8v; mmc-hs200-1_8v; mmc-hs400-1_8v; mmc-hs400-enhanced-strobe; bus-width = <8>; non-removable; supports-cqe; no-sd; no-sdio; max-frequency = <192000000>; qcom,devfreq,freq-table = <50000000 200000000>; qcom,scaling-lower-bus-speed-mode = "DDR52"; status = "disabled"; qos0 { mask = <0x0f>; vote = <43>; }; }; sdhc_2: sdhci@4784000 { compatible = "qcom,sdhci-msm-v5"; reg = <0x4784000 0x1000>; reg-names = "hc_mem"; interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "hc_irq", "pwr_irq"; clocks = <&gcc GCC_SDCC2_AHB_CLK>, <&gcc GCC_SDCC2_APPS_CLK>; clock-names = "core", "iface"; interconnects = <&system_noc MASTER_SDCC_2 &bimc SLAVE_EBI_CH0>, <&bimc MASTER_AMPSS_M0 &config_noc SLAVE_SDCC_2>; interconnect-names = "sdhc-ddr","cpu-sdhc"; qcom,msm-bus,name = "sdhc2"; qcom,msm-bus,num-cases = <8>; qcom,msm-bus,num-paths = <2>; qcom,msm-bus,vectors-KBps = /* No vote */ <81 512 0 0>, <1 608 0 0>, /* 400 KB/s*/ <81 512 1046 3200>, <1 608 1600 1600>, /* 20 MB/s */ <81 512 52286 250000>, <1 608 80000 133320>, /* 25 MB/s */ <81 512 65360 250000>, <1 608 100000 133320>, /* 50 MB/s */ <81 512 130718 250000>, <1 608 133320 133320>, /* 100 MB/s */ <81 512 261438 250000>, <1 608 150000 133320>, /* 200 MB/s */ <81 512 261438 800000>, <1 608 300000 300000>, /* Max. bandwidth */ <81 512 1338562 4096000>, <1 608 1338562 4096000>; qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000 100750000 200000000 4294967295>; /* DLL HSR settings. Refer go/hsr - <Target> DLL settings */ qcom,dll-hsr-list = <0x0007642c 0x0 0x0 0x00010800 0x80040868>; bus-width = <4>; iommus = <&apps_smmu 0xA0 0x0>; qcom,iommu-dma = "bypass"; no-mmc; no-sdio; max-frequency = <202000000>; qcom,devfreq,freq-table = <50000000 202000000>; status = "disabled"; qos0 { mask = <0x0f>; vote = <43>; }; }; qfprom: qfprom@1b40000 { compatible = "qcom,qfprom"; reg = <0x1b40000 0x7000>; Loading