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Commit 76db2d46 authored by Martin Fuzzey's avatar Martin Fuzzey Committed by David S. Miller
Browse files

net: phy: smsc: LAN8740: add PHY_RST_AFTER_CLK_EN flag 

The LAN8740, like the 8720, also requires a reset after enabling clock.
The datasheet [1] 3.8.5.1 says:
	"During a Hardware reset, an external clock must be supplied
	to the XTAL1/CLKIN signal."

I have observed this issue on a custom i.MX6 based board with
the LAN8740A.

[1] http://ww1.microchip.com/downloads/en/DeviceDoc/8740a.pdf



Signed-off-by: default avatarMartin Fuzzey <martin.fuzzey@flowbird.group>
Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 55667441

drivers/net/phy/smsc.c

+1 −0
Original line number Original line Diff line number Diff line
@@ -327,6 +327,7 @@ static struct phy_driver smsc_phy_driver[] = { 
	.name		= "SMSC LAN8740",

	.name		= "SMSC LAN8740",





	/* PHY_BASIC_FEATURES */

	/* PHY_BASIC_FEATURES */

	.flags		= PHY_RST_AFTER_CLK_EN,





	.probe		= smsc_phy_probe,

	.probe		= smsc_phy_probe,