Commit 76740fd8 authored Nov 23, 2022 by Fabrice Gasnier Committed by Greg Kroah-Hartman Jan 18, 2023

counter: stm32-lptimer-cnt: fix the check on arr and cmp registers update



[ Upstream commit fd5ac974fc25feed084c2d1599d0dddb4e0556bc ]

The ARR (auto reload register) and CMP (compare) registers are
successively written. The status bits to check the update of these
registers are polled together with regmap_read_poll_timeout().
The condition to end the loop may become true, even if one of the register
isn't correctly updated.
So ensure both status bits are set before clearing them.

Fixes: d8958824 ("iio: counter: Add support for STM32 LPTimer")
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Link: https://lore.kernel.org/r/20221123133609.465614-1-fabrice.gasnier@foss.st.com/


Signed-off-by: William Breathitt Gray <william.gray@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

parent 361412da

drivers/counter/stm32-lptimer-cnt.c

+1 −1

Original line number	Original line	Diff line number	Diff line
	@@ -69,7 +69,7 @@ static int stm32_lptim_set_enable_state(struct stm32_lptim_cnt *priv,

	/* ensure CMP & ARR registers are properly written */		/* ensure CMP & ARR registers are properly written */
	ret = regmap_read_poll_timeout(priv->regmap, STM32_LPTIM_ISR, val,		ret = regmap_read_poll_timeout(priv->regmap, STM32_LPTIM_ISR, val,
	(val & STM32_LPTIM_CMPOK_ARROK),		(val & STM32_LPTIM_CMPOK_ARROK) == STM32_LPTIM_CMPOK_ARROK,
	100, 1000);		100, 1000);
	if (ret)		if (ret)
	return ret;		return ret;