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Commit 76551468 authored by Eugeniy Paltsev's avatar Eugeniy Paltsev Committed by Vineet Gupta
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ARCv2: Add explcit unaligned access support (and ability to disable too)



As of today we enable unaligned access unconditionally on ARCv2.
Do this under a Kconfig option to allow disable it for test, benchmarking
etc. Also while at it

  - Select HAVE_EFFICIENT_UNALIGNED_ACCESS
  - Although gcc defaults to unaligned access (since GNU 2018.03), add the
    right toggles for enabling or disabling as appropriate
  - update bootlog to prints both HW feature status (exists, enabled/disabled)
    and SW status (used / not used).
  - wire up the relaxed memcpy for unaligned access

Signed-off-by: default avatarEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: default avatarVineet Gupta <vgupta@synopsys.com>
[vgupta: squashed patches, handle gcc -mno-unaligned-access quick]
parent 4d1e7918
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+9 −0
Original line number Diff line number Diff line
@@ -386,6 +386,15 @@ config ARC_HAS_SWAPE

if ISA_ARCV2

config ARC_USE_UNALIGNED_MEM_ACCESS
	bool "Enable unaligned access in HW"
	default y
	select HAVE_EFFICIENT_UNALIGNED_ACCESS
	help
	  The ARC HS architecture supports unaligned memory access
	  which is disabled by default. Enable unaligned access in
	  hardware and use software to use it

config ARC_HAS_LL64
	bool "Insn: 64bit LDD/STD"
	help
+6 −0
Original line number Diff line number Diff line
@@ -28,6 +28,12 @@ cflags-$(CONFIG_ARC_HAS_SWAPE) += -mswape

ifdef CONFIG_ISA_ARCV2

ifdef CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS
cflags-y				+= -munaligned-access
else
cflags-y				+= -mno-unaligned-access
endif

ifndef CONFIG_ARC_HAS_LL64
cflags-y				+= -mno-ll64
endif
+1 −0
Original line number Diff line number Diff line
@@ -82,6 +82,7 @@
#define ECR_V_DTLB_MISS			0x05
#define ECR_V_PROTV			0x06
#define ECR_V_TRAP			0x09
#define ECR_V_MISALIGN			0x0d
#endif

/* DTLB Miss and Protection Violation Cause Codes */
+7 −1
Original line number Diff line number Diff line
@@ -44,7 +44,13 @@
#define ARCV2_IRQ_DEF_PRIO	1

/* seed value for status register */
#define ISA_INIT_STATUS_BITS	(STATUS_IE_MASK | STATUS_AD_MASK | \
#ifdef CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS
#define __AD_ENB	STATUS_AD_MASK
#else
#define __AD_ENB	0
#endif

#define ISA_INIT_STATUS_BITS	(STATUS_IE_MASK | __AD_ENB | \
					(ARCV2_IRQ_DEF_PRIO << 1))

#ifndef __ASSEMBLY__
+5 −0
Original line number Diff line number Diff line
@@ -54,7 +54,12 @@
	; gcc 7.3.1 (ARC GNU 2018.03) onwards generates unaligned access
	; by default
	lr	r5, [status32]
#ifdef CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS
	bset	r5, r5, STATUS_AD_BIT
#else
	; Although disabled at reset, bootloader might have enabled it
	bclr	r5, r5, STATUS_AD_BIT
#endif
	kflag	r5
#endif
.endm
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