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Commit 75c004df authored by Linus Walleij's avatar Linus Walleij
Browse files

gpio: dt-bindings: document the concept of GPIO banks 



Cc: devicetree@vger.kernel.org
Cc: Neil Armstrong <narmstrong@baylibre.com>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent dd98756d

Documentation/devicetree/bindings/gpio/gpio.txt

+14 −0
Original line number Diff line number Diff line
@@ -131,6 +131,19 @@ Every GPIO controller node must contain both an empty "gpio-controller" 
property, and a #gpio-cells integer property, which indicates the number of

cells in a gpio-specifier.



Some system-on-chips (SoCs) use the concept of GPIO banks. A GPIO bank is an

instance of a hardware IP core on a silicon die, usually exposed to the

programmer as a coherent range of I/O addresses. Usually each such bank is

exposed in the device tree as an individual gpio-controller node, reflecting

the fact that the hardware was synthesized by reusing the same IP block a

few times over.



A GPIO controller may specify a bank ID. This is a hardware index that

indicate the logical order of the GPIO controller in the hardware architecture,

usually in the sequence 0, 1, 2 .. n. The hardware index may be different

from the order of register ranges and related to the backplane of how this

one bank is connected to the outside through a pin controller for example.



Optionally, a GPIO controller may have a "ngpios" property. This property

indicates the number of in-use slots of available slots for GPIOs. The

typical example is something like this: the hardware register is 32 bits
@@ -152,6 +165,7 @@ gpio-controller@00000000 { 
	reg = <0x00000000 0x1000>;

	gpio-controller;

	#gpio-cells = <2>;

	gpio-bank = <0>;

	ngpios = <18>;

}