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Commit 7563907e authored by Michael Barkowski's avatar Michael Barkowski Committed by Jeff Garzik
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ucc_geth: Fix interrupt coalescing size and alignment 



The rx interrupt coalescing table alignment was "guessed" to be 4,
but should be 64. The size should be 8 * number of queues + 4.
Verified in the MPC8323E manual.

Signed-off-by: default avatarMichael Barkowski <Michael.Barkowski@freescale.com>
Signed-off-by: default avatarKim Phillips <kim.phillips@freescale.com>
Signed-off-by: default avatarJeff Garzik <jeff@garzik.org>
parent 702ff12c

drivers/net/ucc_geth.c

+2 −2
Original line number Diff line number Diff line
@@ -2958,8 +2958,8 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth) 
	/* Size varies with number of Rx queues */

	ugeth->rx_irq_coalescing_tbl_offset =

	    qe_muram_alloc(ug_info->numQueuesRx *

			   sizeof(struct ucc_geth_rx_interrupt_coalescing_entry),

			   UCC_GETH_RX_INTERRUPT_COALESCING_ALIGNMENT);

			   sizeof(struct ucc_geth_rx_interrupt_coalescing_entry)

			   + 4, UCC_GETH_RX_INTERRUPT_COALESCING_ALIGNMENT);

	if (IS_MURAM_ERR(ugeth->rx_irq_coalescing_tbl_offset)) {

		ugeth_err

		    ("%s: Can not allocate DPRAM memory for"

drivers/net/ucc_geth.h

+1 −2
Original line number Diff line number Diff line
@@ -867,8 +867,7 @@ struct ucc_geth_hardware_statistics { 
#define UCC_GETH_SCHEDULER_ALIGNMENT		4	/* This is a guess */

#define UCC_GETH_TX_STATISTICS_ALIGNMENT	4	/* This is a guess */

#define UCC_GETH_RX_STATISTICS_ALIGNMENT	4	/* This is a guess */

#define UCC_GETH_RX_INTERRUPT_COALESCING_ALIGNMENT	4	/* This is a

								   guess */

#define UCC_GETH_RX_INTERRUPT_COALESCING_ALIGNMENT	64

#define UCC_GETH_RX_BD_QUEUES_ALIGNMENT		8	/* This is a guess */

#define UCC_GETH_RX_PREFETCHED_BDS_ALIGNMENT	128	/* This is a guess */

#define UCC_GETH_RX_EXTENDED_FILTERING_GLOBAL_PARAMETERS_ALIGNMENT 4	/* This