Loading .mailmap +1 −0 Original line number Original line Diff line number Diff line Loading @@ -33,6 +33,7 @@ Björn Steinbrink <B.Steinbrink@gmx.de> Brian Avery <b.avery@hp.com> Brian Avery <b.avery@hp.com> Brian King <brking@us.ibm.com> Brian King <brking@us.ibm.com> Christoph Hellwig <hch@lst.de> Christoph Hellwig <hch@lst.de> Christophe Ricard <christophe.ricard@gmail.com> Corey Minyard <minyard@acm.org> Corey Minyard <minyard@acm.org> Damian Hobson-Garcia <dhobsong@igel.co.jp> Damian Hobson-Garcia <dhobsong@igel.co.jp> David Brownell <david-b@pacbell.net> David Brownell <david-b@pacbell.net> Loading Documentation/ABI/testing/sysfs-platform-i2c-demux-pinctrl +12 −17 Original line number Original line Diff line number Diff line What: /sys/devices/platform/<i2c-demux-name>/cur_master What: /sys/devices/platform/<i2c-demux-name>/available_masters Date: January 2016 Date: January 2016 KernelVersion: 4.6 KernelVersion: 4.6 Contact: Wolfram Sang <wsa@the-dreams.de> Contact: Wolfram Sang <wsa@the-dreams.de> Description: Description: Reading the file will give you a list of masters which can be selected for a demultiplexed bus. The format is "<index>:<name>". Example from a Renesas Lager board: This file selects the active I2C master for a demultiplexed bus. 0:/i2c@e6500000 1:/i2c@e6508000 Write 0 there for the first master, 1 for the second etc. Reading the file will What: /sys/devices/platform/<i2c-demux-name>/current_master give you a list with the active master marked. Example from a Renesas Lager Date: January 2016 board: KernelVersion: 4.6 Contact: Wolfram Sang <wsa@the-dreams.de> root@Lager:~# cat /sys/devices/platform/i2c@8/cur_master Description: * 0 - /i2c@9 This file selects/shows the active I2C master for a demultiplexed 1 - /i2c@e6520000 bus. It uses the <index> value from the file 'available_masters'. 2 - /i2c@e6530000 root@Lager:~# echo 2 > /sys/devices/platform/i2c@8/cur_master root@Lager:~# cat /sys/devices/platform/i2c@8/cur_master 0 - /i2c@9 1 - /i2c@e6520000 * 2 - /i2c@e6530000 Documentation/devicetree/bindings/clock/qca,ath79-pll.txt +3 −3 Original line number Original line Diff line number Diff line Loading @@ -3,7 +3,7 @@ Binding for Qualcomm Atheros AR7xxx/AR9XXX PLL controller The PPL controller provides the 3 main clocks of the SoC: CPU, DDR and AHB. The PPL controller provides the 3 main clocks of the SoC: CPU, DDR and AHB. Required Properties: Required Properties: - compatible: has to be "qca,<soctype>-cpu-intc" and one of the following - compatible: has to be "qca,<soctype>-pll" and one of the following fallbacks: fallbacks: - "qca,ar7100-pll" - "qca,ar7100-pll" - "qca,ar7240-pll" - "qca,ar7240-pll" Loading @@ -21,8 +21,8 @@ Optional properties: Example: Example: memory-controller@18050000 { pll-controller@18050000 { compatible = "qca,ar9132-ppl", "qca,ar9130-pll"; compatible = "qca,ar9132-pll", "qca,ar9130-pll"; reg = <0x18050000 0x20>; reg = <0x18050000 0x20>; clock-names = "ref"; clock-names = "ref"; Loading Documentation/devicetree/bindings/pinctrl/img,pistachio-pinctrl.txt +6 −6 Original line number Original line Diff line number Diff line Loading @@ -134,12 +134,12 @@ mfio80 ddr_debug, mips_trace_data, mips_debug mfio81 dreq0, mips_trace_data, eth_debug mfio81 dreq0, mips_trace_data, eth_debug mfio82 dreq1, mips_trace_data, eth_debug mfio82 dreq1, mips_trace_data, eth_debug mfio83 mips_pll_lock, mips_trace_data, usb_debug mfio83 mips_pll_lock, mips_trace_data, usb_debug mfio84 sys_pll_lock, mips_trace_data, usb_debug mfio84 audio_pll_lock, mips_trace_data, usb_debug mfio85 wifi_pll_lock, mips_trace_data, sdhost_debug mfio85 rpu_v_pll_lock, mips_trace_data, sdhost_debug mfio86 bt_pll_lock, mips_trace_data, sdhost_debug mfio86 rpu_l_pll_lock, mips_trace_data, sdhost_debug mfio87 rpu_v_pll_lock, dreq2, socif_debug mfio87 sys_pll_lock, dreq2, socif_debug mfio88 rpu_l_pll_lock, dreq3, socif_debug mfio88 wifi_pll_lock, dreq3, socif_debug mfio89 audio_pll_lock, dreq4, dreq5 mfio89 bt_pll_lock, dreq4, dreq5 tck tck trstn trstn tdi tdi Loading Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt +7 −31 Original line number Original line Diff line number Diff line == Amlogic Meson pinmux controller == == Amlogic Meson pinmux controller == Required properties for the root node: Required properties for the root node: - compatible: "amlogic,meson8-pinctrl" or "amlogic,meson8b-pinctrl" - compatible: one of "amlogic,meson8-cbus-pinctrl" "amlogic,meson8b-cbus-pinctrl" "amlogic,meson8-aobus-pinctrl" "amlogic,meson8b-aobus-pinctrl" - reg: address and size of registers controlling irq functionality - reg: address and size of registers controlling irq functionality === GPIO sub-nodes === === GPIO sub-nodes === The 2 power domains of the controller (regular and always-on) are The GPIO bank for the controller is represented as a sub-node and it acts as a represented as sub-nodes and each of them acts as a GPIO controller. GPIO controller. Required properties for sub-nodes are: Required properties for sub-nodes are: - reg: should contain address and size for mux, pull-enable, pull and - reg: should contain address and size for mux, pull-enable, pull and Loading @@ -18,10 +21,6 @@ Required properties for sub-nodes are: - gpio-controller: identifies the node as a gpio controller - gpio-controller: identifies the node as a gpio controller - #gpio-cells: must be 2 - #gpio-cells: must be 2 Valid sub-node names are: - "banks" for the regular domain - "ao-bank" for the always-on domain === Other sub-nodes === === Other sub-nodes === Child nodes without the "gpio-controller" represent some desired Child nodes without the "gpio-controller" represent some desired Loading @@ -45,7 +44,7 @@ pinctrl-bindings.txt === Example === === Example === pinctrl: pinctrl@c1109880 { pinctrl: pinctrl@c1109880 { compatible = "amlogic,meson8-pinctrl"; compatible = "amlogic,meson8-cbus-pinctrl"; reg = <0xc1109880 0x10>; reg = <0xc1109880 0x10>; #address-cells = <1>; #address-cells = <1>; #size-cells = <1>; #size-cells = <1>; Loading @@ -61,15 +60,6 @@ pinctrl-bindings.txt #gpio-cells = <2>; #gpio-cells = <2>; }; }; gpio_ao: ao-bank@c1108030 { reg = <0xc8100014 0x4>, <0xc810002c 0x4>, <0xc8100024 0x8>; reg-names = "mux", "pull", "gpio"; gpio-controller; #gpio-cells = <2>; }; nand { nand { mux { mux { groups = "nand_io", "nand_io_ce0", "nand_io_ce1", groups = "nand_io", "nand_io_ce0", "nand_io_ce1", Loading @@ -79,18 +69,4 @@ pinctrl-bindings.txt function = "nand"; function = "nand"; }; }; }; }; uart_ao_a { mux { groups = "uart_tx_ao_a", "uart_rx_ao_a", "uart_cts_ao_a", "uart_rts_ao_a"; function = "uart_ao"; }; conf { pins = "GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3"; bias-disable; }; }; }; }; Loading
.mailmap +1 −0 Original line number Original line Diff line number Diff line Loading @@ -33,6 +33,7 @@ Björn Steinbrink <B.Steinbrink@gmx.de> Brian Avery <b.avery@hp.com> Brian Avery <b.avery@hp.com> Brian King <brking@us.ibm.com> Brian King <brking@us.ibm.com> Christoph Hellwig <hch@lst.de> Christoph Hellwig <hch@lst.de> Christophe Ricard <christophe.ricard@gmail.com> Corey Minyard <minyard@acm.org> Corey Minyard <minyard@acm.org> Damian Hobson-Garcia <dhobsong@igel.co.jp> Damian Hobson-Garcia <dhobsong@igel.co.jp> David Brownell <david-b@pacbell.net> David Brownell <david-b@pacbell.net> Loading
Documentation/ABI/testing/sysfs-platform-i2c-demux-pinctrl +12 −17 Original line number Original line Diff line number Diff line What: /sys/devices/platform/<i2c-demux-name>/cur_master What: /sys/devices/platform/<i2c-demux-name>/available_masters Date: January 2016 Date: January 2016 KernelVersion: 4.6 KernelVersion: 4.6 Contact: Wolfram Sang <wsa@the-dreams.de> Contact: Wolfram Sang <wsa@the-dreams.de> Description: Description: Reading the file will give you a list of masters which can be selected for a demultiplexed bus. The format is "<index>:<name>". Example from a Renesas Lager board: This file selects the active I2C master for a demultiplexed bus. 0:/i2c@e6500000 1:/i2c@e6508000 Write 0 there for the first master, 1 for the second etc. Reading the file will What: /sys/devices/platform/<i2c-demux-name>/current_master give you a list with the active master marked. Example from a Renesas Lager Date: January 2016 board: KernelVersion: 4.6 Contact: Wolfram Sang <wsa@the-dreams.de> root@Lager:~# cat /sys/devices/platform/i2c@8/cur_master Description: * 0 - /i2c@9 This file selects/shows the active I2C master for a demultiplexed 1 - /i2c@e6520000 bus. It uses the <index> value from the file 'available_masters'. 2 - /i2c@e6530000 root@Lager:~# echo 2 > /sys/devices/platform/i2c@8/cur_master root@Lager:~# cat /sys/devices/platform/i2c@8/cur_master 0 - /i2c@9 1 - /i2c@e6520000 * 2 - /i2c@e6530000
Documentation/devicetree/bindings/clock/qca,ath79-pll.txt +3 −3 Original line number Original line Diff line number Diff line Loading @@ -3,7 +3,7 @@ Binding for Qualcomm Atheros AR7xxx/AR9XXX PLL controller The PPL controller provides the 3 main clocks of the SoC: CPU, DDR and AHB. The PPL controller provides the 3 main clocks of the SoC: CPU, DDR and AHB. Required Properties: Required Properties: - compatible: has to be "qca,<soctype>-cpu-intc" and one of the following - compatible: has to be "qca,<soctype>-pll" and one of the following fallbacks: fallbacks: - "qca,ar7100-pll" - "qca,ar7100-pll" - "qca,ar7240-pll" - "qca,ar7240-pll" Loading @@ -21,8 +21,8 @@ Optional properties: Example: Example: memory-controller@18050000 { pll-controller@18050000 { compatible = "qca,ar9132-ppl", "qca,ar9130-pll"; compatible = "qca,ar9132-pll", "qca,ar9130-pll"; reg = <0x18050000 0x20>; reg = <0x18050000 0x20>; clock-names = "ref"; clock-names = "ref"; Loading
Documentation/devicetree/bindings/pinctrl/img,pistachio-pinctrl.txt +6 −6 Original line number Original line Diff line number Diff line Loading @@ -134,12 +134,12 @@ mfio80 ddr_debug, mips_trace_data, mips_debug mfio81 dreq0, mips_trace_data, eth_debug mfio81 dreq0, mips_trace_data, eth_debug mfio82 dreq1, mips_trace_data, eth_debug mfio82 dreq1, mips_trace_data, eth_debug mfio83 mips_pll_lock, mips_trace_data, usb_debug mfio83 mips_pll_lock, mips_trace_data, usb_debug mfio84 sys_pll_lock, mips_trace_data, usb_debug mfio84 audio_pll_lock, mips_trace_data, usb_debug mfio85 wifi_pll_lock, mips_trace_data, sdhost_debug mfio85 rpu_v_pll_lock, mips_trace_data, sdhost_debug mfio86 bt_pll_lock, mips_trace_data, sdhost_debug mfio86 rpu_l_pll_lock, mips_trace_data, sdhost_debug mfio87 rpu_v_pll_lock, dreq2, socif_debug mfio87 sys_pll_lock, dreq2, socif_debug mfio88 rpu_l_pll_lock, dreq3, socif_debug mfio88 wifi_pll_lock, dreq3, socif_debug mfio89 audio_pll_lock, dreq4, dreq5 mfio89 bt_pll_lock, dreq4, dreq5 tck tck trstn trstn tdi tdi Loading
Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt +7 −31 Original line number Original line Diff line number Diff line == Amlogic Meson pinmux controller == == Amlogic Meson pinmux controller == Required properties for the root node: Required properties for the root node: - compatible: "amlogic,meson8-pinctrl" or "amlogic,meson8b-pinctrl" - compatible: one of "amlogic,meson8-cbus-pinctrl" "amlogic,meson8b-cbus-pinctrl" "amlogic,meson8-aobus-pinctrl" "amlogic,meson8b-aobus-pinctrl" - reg: address and size of registers controlling irq functionality - reg: address and size of registers controlling irq functionality === GPIO sub-nodes === === GPIO sub-nodes === The 2 power domains of the controller (regular and always-on) are The GPIO bank for the controller is represented as a sub-node and it acts as a represented as sub-nodes and each of them acts as a GPIO controller. GPIO controller. Required properties for sub-nodes are: Required properties for sub-nodes are: - reg: should contain address and size for mux, pull-enable, pull and - reg: should contain address and size for mux, pull-enable, pull and Loading @@ -18,10 +21,6 @@ Required properties for sub-nodes are: - gpio-controller: identifies the node as a gpio controller - gpio-controller: identifies the node as a gpio controller - #gpio-cells: must be 2 - #gpio-cells: must be 2 Valid sub-node names are: - "banks" for the regular domain - "ao-bank" for the always-on domain === Other sub-nodes === === Other sub-nodes === Child nodes without the "gpio-controller" represent some desired Child nodes without the "gpio-controller" represent some desired Loading @@ -45,7 +44,7 @@ pinctrl-bindings.txt === Example === === Example === pinctrl: pinctrl@c1109880 { pinctrl: pinctrl@c1109880 { compatible = "amlogic,meson8-pinctrl"; compatible = "amlogic,meson8-cbus-pinctrl"; reg = <0xc1109880 0x10>; reg = <0xc1109880 0x10>; #address-cells = <1>; #address-cells = <1>; #size-cells = <1>; #size-cells = <1>; Loading @@ -61,15 +60,6 @@ pinctrl-bindings.txt #gpio-cells = <2>; #gpio-cells = <2>; }; }; gpio_ao: ao-bank@c1108030 { reg = <0xc8100014 0x4>, <0xc810002c 0x4>, <0xc8100024 0x8>; reg-names = "mux", "pull", "gpio"; gpio-controller; #gpio-cells = <2>; }; nand { nand { mux { mux { groups = "nand_io", "nand_io_ce0", "nand_io_ce1", groups = "nand_io", "nand_io_ce0", "nand_io_ce1", Loading @@ -79,18 +69,4 @@ pinctrl-bindings.txt function = "nand"; function = "nand"; }; }; }; }; uart_ao_a { mux { groups = "uart_tx_ao_a", "uart_rx_ao_a", "uart_cts_ao_a", "uart_rts_ao_a"; function = "uart_ao"; }; conf { pins = "GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3"; bias-disable; }; }; }; };