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Commit 753790e7 authored by Russell King's avatar Russell King
Browse files

ARM: move cache/processor/fault glue to separate include files 



This allows the cache/processor/fault glue to be more easily used
from assembler code.  Tested on Assabet and Tegra 2.

Tested-by: default avatarColin Cross <ccross@android.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 292ec42a

arch/arm/include/asm/cacheflush.h

+2 −131
Original line number Diff line number Diff line
@@ -12,130 +12,13 @@ 


#include <linux/mm.h>



#include <asm/glue.h>

#include <asm/glue-cache.h>

#include <asm/shmparam.h>

#include <asm/cachetype.h>

#include <asm/outercache.h>



#define CACHE_COLOUR(vaddr)	((vaddr & (SHMLBA - 1)) >> PAGE_SHIFT)



/*

 *	Cache Model

 *	===========

 */

#undef _CACHE

#undef MULTI_CACHE



#if defined(CONFIG_CPU_CACHE_V3)

# ifdef _CACHE

#  define MULTI_CACHE 1

# else

#  define _CACHE v3

# endif

#endif



#if defined(CONFIG_CPU_CACHE_V4)

# ifdef _CACHE

#  define MULTI_CACHE 1

# else

#  define _CACHE v4

# endif

#endif



#if defined(CONFIG_CPU_ARM920T) || defined(CONFIG_CPU_ARM922T) || \

    defined(CONFIG_CPU_ARM925T) || defined(CONFIG_CPU_ARM1020) || \

    defined(CONFIG_CPU_ARM1026)

# define MULTI_CACHE 1

#endif



#if defined(CONFIG_CPU_FA526)

# ifdef _CACHE

#  define MULTI_CACHE 1

# else

#  define _CACHE fa

# endif

#endif



#if defined(CONFIG_CPU_ARM926T)

# ifdef _CACHE

#  define MULTI_CACHE 1

# else

#  define _CACHE arm926

# endif

#endif



#if defined(CONFIG_CPU_ARM940T)

# ifdef _CACHE

#  define MULTI_CACHE 1

# else

#  define _CACHE arm940

# endif

#endif



#if defined(CONFIG_CPU_ARM946E)

# ifdef _CACHE

#  define MULTI_CACHE 1

# else

#  define _CACHE arm946

# endif

#endif



#if defined(CONFIG_CPU_CACHE_V4WB)

# ifdef _CACHE

#  define MULTI_CACHE 1

# else

#  define _CACHE v4wb

# endif

#endif



#if defined(CONFIG_CPU_XSCALE)

# ifdef _CACHE

#  define MULTI_CACHE 1

# else

#  define _CACHE xscale

# endif

#endif



#if defined(CONFIG_CPU_XSC3)

# ifdef _CACHE

#  define MULTI_CACHE 1

# else

#  define _CACHE xsc3

# endif

#endif



#if defined(CONFIG_CPU_MOHAWK)

# ifdef _CACHE

#  define MULTI_CACHE 1

# else

#  define _CACHE mohawk

# endif

#endif



#if defined(CONFIG_CPU_FEROCEON)

# define MULTI_CACHE 1

#endif



#if defined(CONFIG_CPU_V6)

//# ifdef _CACHE

#  define MULTI_CACHE 1

//# else

//#  define _CACHE v6

//# endif

#endif



#if defined(CONFIG_CPU_V7)

//# ifdef _CACHE

#  define MULTI_CACHE 1

//# else

//#  define _CACHE v7

//# endif

#endif



#if !defined(_CACHE) && !defined(MULTI_CACHE)

#error Unknown cache maintainence model

#endif



/*

 * This flag is used to indicate that the page pointed to by a pte is clean

 * and does not require cleaning before returning it to the user.
@@ -254,14 +137,6 @@ extern struct cpu_cache_fns cpu_cache; 


#else



#define __cpuc_flush_icache_all		__glue(_CACHE,_flush_icache_all)

#define __cpuc_flush_kern_all		__glue(_CACHE,_flush_kern_cache_all)

#define __cpuc_flush_user_all		__glue(_CACHE,_flush_user_cache_all)

#define __cpuc_flush_user_range		__glue(_CACHE,_flush_user_cache_range)

#define __cpuc_coherent_kern_range	__glue(_CACHE,_coherent_kern_range)

#define __cpuc_coherent_user_range	__glue(_CACHE,_coherent_user_range)

#define __cpuc_flush_dcache_area	__glue(_CACHE,_flush_kern_dcache_area)



extern void __cpuc_flush_icache_all(void);

extern void __cpuc_flush_kern_all(void);

extern void __cpuc_flush_user_all(void);
@@ -276,10 +151,6 @@ extern void __cpuc_flush_dcache_area(void *, size_t); 
 * is visible to DMA, or data written by DMA to system memory is

 * visible to the CPU.

 */

#define dmac_map_area			__glue(_CACHE,_dma_map_area)

#define dmac_unmap_area		__glue(_CACHE,_dma_unmap_area)

#define dmac_flush_range		__glue(_CACHE,_dma_flush_range)



extern void dmac_map_area(const void *, size_t, int);

extern void dmac_unmap_area(const void *, size_t, int);

extern void dmac_flush_range(const void *, const void *);

arch/arm/include/asm/cpu-multi32.h

deleted100644 → 0
+0 −69
Original line number Diff line number Diff line 
/*

 *  arch/arm/include/asm/cpu-multi32.h

 *

 *  Copyright (C) 2000 Russell King

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 */

#include <asm/page.h>



struct mm_struct;



/*

 * Don't change this structure - ASM code

 * relies on it.

 */

extern struct processor {

	/* MISC

	 * get data abort address/flags

	 */

	void (*_data_abort)(unsigned long pc);

	/*

	 * Retrieve prefetch fault address

	 */

	unsigned long (*_prefetch_abort)(unsigned long lr);

	/*

	 * Set up any processor specifics

	 */

	void (*_proc_init)(void);

	/*

	 * Disable any processor specifics

	 */

	void (*_proc_fin)(void);

	/*

	 * Special stuff for a reset

	 */

	void (*reset)(unsigned long addr) __attribute__((noreturn));

	/*

	 * Idle the processor

	 */

	int (*_do_idle)(void);

	/*

	 * Processor architecture specific

	 */

	/*

	 * clean a virtual address range from the

	 * D-cache without flushing the cache.

	 */

	void (*dcache_clean_area)(void *addr, int size);



	/*

	 * Set the page table

	 */

	void (*switch_mm)(unsigned long pgd_phys, struct mm_struct *mm);

	/*

	 * Set a possibly extended PTE.  Non-extended PTEs should

	 * ignore 'ext'.

	 */

	void (*set_pte_ext)(pte_t *ptep, pte_t pte, unsigned int ext);

} processor;



#define cpu_proc_init()			processor._proc_init()

#define cpu_proc_fin()			processor._proc_fin()

#define cpu_reset(addr)			processor.reset(addr)

#define cpu_do_idle()			processor._do_idle()

#define cpu_dcache_clean_area(addr,sz)	processor.dcache_clean_area(addr,sz)

#define cpu_set_pte_ext(ptep,pte,ext)	processor.set_pte_ext(ptep,pte,ext)

#define cpu_do_switch_mm(pgd,mm)	processor.switch_mm(pgd,mm)

arch/arm/include/asm/cpu-single.h

deleted100644 → 0
+0 −44
Original line number Diff line number Diff line 
/*

 *  arch/arm/include/asm/cpu-single.h

 *

 *  Copyright (C) 2000 Russell King

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 */

/*

 * Single CPU

 */

#ifdef __STDC__

#define __catify_fn(name,x)	name##x

#else

#define __catify_fn(name,x)	name/**/x

#endif

#define __cpu_fn(name,x)	__catify_fn(name,x)



/*

 * If we are supporting multiple CPUs, then we must use a table of

 * function pointers for this lot.  Otherwise, we can optimise the

 * table away.

 */

#define cpu_proc_init			__cpu_fn(CPU_NAME,_proc_init)

#define cpu_proc_fin			__cpu_fn(CPU_NAME,_proc_fin)

#define cpu_reset			__cpu_fn(CPU_NAME,_reset)

#define cpu_do_idle			__cpu_fn(CPU_NAME,_do_idle)

#define cpu_dcache_clean_area		__cpu_fn(CPU_NAME,_dcache_clean_area)

#define cpu_do_switch_mm		__cpu_fn(CPU_NAME,_switch_mm)

#define cpu_set_pte_ext			__cpu_fn(CPU_NAME,_set_pte_ext)



#include <asm/page.h>



struct mm_struct;



/* declare all the functions as extern */

extern void cpu_proc_init(void);

extern void cpu_proc_fin(void);

extern int cpu_do_idle(void);

extern void cpu_dcache_clean_area(void *, int);

extern void cpu_do_switch_mm(unsigned long pgd_phys, struct mm_struct *mm);

extern void cpu_set_pte_ext(pte_t *ptep, pte_t pte, unsigned int ext);

extern void cpu_reset(unsigned long addr) __attribute__((noreturn));

arch/arm/include/asm/glue-cache.h

0 → 100644
+146 −0
Original line number Diff line number Diff line 
/*

 *  arch/arm/include/asm/glue-cache.h

 *

 *  Copyright (C) 1999-2002 Russell King

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 */

#ifndef ASM_GLUE_CACHE_H

#define ASM_GLUE_CACHE_H



#include <asm/glue.h>



/*

 *	Cache Model

 *	===========

 */

#undef _CACHE

#undef MULTI_CACHE



#if defined(CONFIG_CPU_CACHE_V3)

# ifdef _CACHE

#  define MULTI_CACHE 1

# else

#  define _CACHE v3

# endif

#endif



#if defined(CONFIG_CPU_CACHE_V4)

# ifdef _CACHE

#  define MULTI_CACHE 1

# else

#  define _CACHE v4

# endif

#endif



#if defined(CONFIG_CPU_ARM920T) || defined(CONFIG_CPU_ARM922T) || \

    defined(CONFIG_CPU_ARM925T) || defined(CONFIG_CPU_ARM1020) || \

    defined(CONFIG_CPU_ARM1026)

# define MULTI_CACHE 1

#endif



#if defined(CONFIG_CPU_FA526)

# ifdef _CACHE

#  define MULTI_CACHE 1

# else

#  define _CACHE fa

# endif

#endif



#if defined(CONFIG_CPU_ARM926T)

# ifdef _CACHE

#  define MULTI_CACHE 1

# else

#  define _CACHE arm926

# endif

#endif



#if defined(CONFIG_CPU_ARM940T)

# ifdef _CACHE

#  define MULTI_CACHE 1

# else

#  define _CACHE arm940

# endif

#endif



#if defined(CONFIG_CPU_ARM946E)

# ifdef _CACHE

#  define MULTI_CACHE 1

# else

#  define _CACHE arm946

# endif

#endif



#if defined(CONFIG_CPU_CACHE_V4WB)

# ifdef _CACHE

#  define MULTI_CACHE 1

# else

#  define _CACHE v4wb

# endif

#endif



#if defined(CONFIG_CPU_XSCALE)

# ifdef _CACHE

#  define MULTI_CACHE 1

# else

#  define _CACHE xscale

# endif

#endif



#if defined(CONFIG_CPU_XSC3)

# ifdef _CACHE

#  define MULTI_CACHE 1

# else

#  define _CACHE xsc3

# endif

#endif



#if defined(CONFIG_CPU_MOHAWK)

# ifdef _CACHE

#  define MULTI_CACHE 1

# else

#  define _CACHE mohawk

# endif

#endif



#if defined(CONFIG_CPU_FEROCEON)

# define MULTI_CACHE 1

#endif



#if defined(CONFIG_CPU_V6)

//# ifdef _CACHE

#  define MULTI_CACHE 1

//# else

//#  define _CACHE v6

//# endif

#endif



#if defined(CONFIG_CPU_V7)

//# ifdef _CACHE

#  define MULTI_CACHE 1

//# else

//#  define _CACHE v7

//# endif

#endif



#if !defined(_CACHE) && !defined(MULTI_CACHE)

#error Unknown cache maintainence model

#endif



#ifndef MULTI_CACHE

#define __cpuc_flush_icache_all		__glue(_CACHE,_flush_icache_all)

#define __cpuc_flush_kern_all		__glue(_CACHE,_flush_kern_cache_all)

#define __cpuc_flush_user_all		__glue(_CACHE,_flush_user_cache_all)

#define __cpuc_flush_user_range		__glue(_CACHE,_flush_user_cache_range)

#define __cpuc_coherent_kern_range	__glue(_CACHE,_coherent_kern_range)

#define __cpuc_coherent_user_range	__glue(_CACHE,_coherent_user_range)

#define __cpuc_flush_dcache_area	__glue(_CACHE,_flush_kern_dcache_area)



#define dmac_map_area			__glue(_CACHE,_dma_map_area)

#define dmac_unmap_area			__glue(_CACHE,_dma_unmap_area)

#define dmac_flush_range		__glue(_CACHE,_dma_flush_range)

#endif



#endif

arch/arm/include/asm/glue-df.h

0 → 100644
+110 −0
Original line number Diff line number Diff line 
/*

 *  arch/arm/include/asm/glue-df.h

 *

 *  Copyright (C) 1997-1999 Russell King

 *  Copyright (C) 2000-2002 Deep Blue Solutions Ltd.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 */

#ifndef ASM_GLUE_DF_H

#define ASM_GLUE_DF_H



#include <asm/glue.h>



/*

 *	Data Abort Model

 *	================

 *

 *	We have the following to choose from:

 *	  arm6          - ARM6 style

 *	  arm7		- ARM7 style

 *	  v4_early	- ARMv4 without Thumb early abort handler

 *	  v4t_late	- ARMv4 with Thumb late abort handler

 *	  v4t_early	- ARMv4 with Thumb early abort handler

 *	  v5tej_early	- ARMv5 with Thumb and Java early abort handler

 *	  xscale	- ARMv5 with Thumb with Xscale extensions

 *	  v6_early	- ARMv6 generic early abort handler

 *	  v7_early	- ARMv7 generic early abort handler

 */

#undef CPU_DABORT_HANDLER

#undef MULTI_DABORT



#if defined(CONFIG_CPU_ARM610)

# ifdef CPU_DABORT_HANDLER

#  define MULTI_DABORT 1

# else

#  define CPU_DABORT_HANDLER cpu_arm6_data_abort

# endif

#endif



#if defined(CONFIG_CPU_ARM710)

# ifdef CPU_DABORT_HANDLER

#  define MULTI_DABORT 1

# else

#  define CPU_DABORT_HANDLER cpu_arm7_data_abort

# endif

#endif



#ifdef CONFIG_CPU_ABRT_LV4T

# ifdef CPU_DABORT_HANDLER

#  define MULTI_DABORT 1

# else

#  define CPU_DABORT_HANDLER v4t_late_abort

# endif

#endif



#ifdef CONFIG_CPU_ABRT_EV4

# ifdef CPU_DABORT_HANDLER

#  define MULTI_DABORT 1

# else

#  define CPU_DABORT_HANDLER v4_early_abort

# endif

#endif



#ifdef CONFIG_CPU_ABRT_EV4T

# ifdef CPU_DABORT_HANDLER

#  define MULTI_DABORT 1

# else

#  define CPU_DABORT_HANDLER v4t_early_abort

# endif

#endif



#ifdef CONFIG_CPU_ABRT_EV5TJ

# ifdef CPU_DABORT_HANDLER

#  define MULTI_DABORT 1

# else

#  define CPU_DABORT_HANDLER v5tj_early_abort

# endif

#endif



#ifdef CONFIG_CPU_ABRT_EV5T

# ifdef CPU_DABORT_HANDLER

#  define MULTI_DABORT 1

# else

#  define CPU_DABORT_HANDLER v5t_early_abort

# endif

#endif



#ifdef CONFIG_CPU_ABRT_EV6

# ifdef CPU_DABORT_HANDLER

#  define MULTI_DABORT 1

# else

#  define CPU_DABORT_HANDLER v6_early_abort

# endif

#endif



#ifdef CONFIG_CPU_ABRT_EV7

# ifdef CPU_DABORT_HANDLER

#  define MULTI_DABORT 1

# else

#  define CPU_DABORT_HANDLER v7_early_abort

# endif

#endif



#ifndef CPU_DABORT_HANDLER

#error Unknown data abort handler type

#endif



#endif