Loading qcom/sm6150-pinctrl.dtsi +10 −1 Original line number Diff line number Diff line Loading @@ -3,11 +3,20 @@ compatible = "qcom,sm6150-pinctrl"; reg = <0x03000000 0xdc2000>, <0x17c000f0 0x50>; reg-names = "pinctrl", "spi_cfg"; interrupts = <0 208 0>; interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; wakeup-parent = <&pdc>; ufs_dev_reset_assert: ufs_dev_reset_assert { config { Loading qcom/sm6150-pm.dtsi 0 → 100644 +174 −0 Original line number Diff line number Diff line &soc { qcom,lpm-levels { compatible = "qcom,lpm-levels"; #address-cells = <1>; #size-cells = <0>; qcom,pm-cluster@0 { reg = <0>; #address-cells = <1>; #size-cells = <0>; idle-state-name = "L3"; qcom,psci-mode-shift = <4>; qcom,psci-mode-mask = <0xfff>; CLUSTER_WFI: qcom,pm-cluster-level@0 { /* D1 */ reg = <0>; compatible = "arm,idle-state"; idle-state-name = "l3-wfi"; entry-latency-us = <660>; exit-latency-us = <600>; min-residency-us = <1260>; arm,psci-suspend-param = <0x10>; qcom,psci-mode = <0x1>; }; CLUSTER_OFF: qcom,pm-cluster-level@1 { /* D4 */ reg = <1>; compatible = "arm,idle-state"; idle-state-name = "l3-pc"; entry-latency-us = <2752>; exit-latency-us = <3048>; min-residency-us = <6118>; arm,psci-suspend-param = <0x40>; qcom,psci-mode = <0x4>; qcom,is-reset; qcom,min-child-idx = <2>; }; CX_RET: qcom,pm-cluster-level@2 { /* Cx Ret */ reg = <2>; compatible = "arm,idle-state"; idle-state-name = "cx-ret"; entry-latency-us = <3263>; exit-latency-us = <4562>; min-residency-us = <8467>; arm,psci-suspend-param = <0x1240>; qcom,psci-mode = <0x124>; qcom,is-reset; qcom,notify-rpm; qcom,min-child-idx = <2>; }; LLCC_OFF: qcom,pm-cluster-level@3 { /* AOSS sleep */ reg = <3>; compatible = "arm,idle-state"; idle-state-name = "llcc-off"; entry-latency-us = <3638>; exit-latency-us = <6562>; min-residency-us = <9826>; arm,psci-suspend-param = <0xb240>; qcom,psci-mode = <0xb24>; qcom,is-reset; qcom,notify-rpm; qcom,min-child-idx = <2>; }; qcom,pm-cpu@0 { reg = <0>; #address-cells = <1>; #size-cells = <0>; qcom,psci-mode-shift = <0>; qcom,psci-mode-mask = <0xf>; qcom,cpu = <&CPU0 &CPU1 &CPU2 &CPU3 &CPU4 &CPU5>; SLVR_WFI: qcom,pm-cpu-level@0 { /* C1 */ reg = <0>; compatible = "arm,idle-state"; idle-state-name = "wfi"; entry-latency-us = <61>; exit-latency-us = <60>; min-residency-us = <121>; arm,psci-suspend-param = <0x1>; qcom,psci-cpu-mode = <0x1>; }; SLVR_OFF: qcom,pm-cpu-level@1 { /* C3 */ reg = <1>; compatible = "arm,idle-state"; idle-state-name = "pc"; entry-latency-us = <549>; exit-latency-us = <901>; min-residency-us = <1774>; arm,psci-suspend-param = <0x40000003>; qcom,psci-cpu-mode = <0x3>; local-timer-stop; qcom,is-reset; qcom,use-broadcast-timer; }; SLVR_RAIL_OFF: qcom,pm-cpu-level@2 { /* C4 */ reg = <2>; compatible = "arm,idle-state"; idle-state-name = "rail-pc"; entry-latency-us = <702>; exit-latency-us = <915>; min-residency-us = <4001>; arm,psci-suspend-param = <0x40000004>; qcom,psci-cpu-mode = <0x4>; local-timer-stop; qcom,is-reset; qcom,use-broadcast-timer; }; }; qcom,pm-cpu@1 { reg = <1>; #address-cells = <1>; #size-cells = <0>; qcom,psci-mode-shift = <0>; qcom,psci-mode-mask = <0xf>; qcom,cpu = <&CPU6 &CPU7>; GOLD_WFI: qcom,pm-cpu-level@0 { /* C1 */ reg = <0>; compatible = "arm,idle-state"; idle-state-name = "wfi"; entry-latency-us = <55>; exit-latency-us = <66>; min-residency-us = <121>; arm,psci-suspend-param = <0x1>; qcom,psci-cpu-mode = <0x1>; }; GOLD_OFF: qcom,pm-cpu-level@1 { /* C3 */ reg = <1>; compatible = "arm,idle-state"; idle-state-name = "pc"; entry-latency-us = <523>; exit-latency-us = <1244>; min-residency-us = <2207>; arm,psci-suspend-param = <0x40000003>; qcom,psci-cpu-mode = <0x3>; local-timer-stop; qcom,is-reset; qcom,use-broadcast-timer; }; GOLD_RAIL_OFF: qcom,pm-cpu-level@2 { /* C4 */ reg = <2>; compatible = "arm,idle-state"; idle-state-name = "rail-pc"; entry-latency-us = <526>; exit-latency-us = <1854>; min-residency-us = <5555>; arm,psci-suspend-param = <0x40000004>; qcom,psci-cpu-mode = <0x4>; local-timer-stop; qcom,is-reset; qcom,use-broadcast-timer; }; }; }; }; rpmh-master-stats@b221200 { compatible = "qcom,rpmh-master-stats-v1"; reg = <0xb221200 0x60>; }; soc-sleep-stats@c3f0000 { compatible = "qcom,rpmh-sleep-stats"; reg = <0xc3f0000 0x400>; }; }; qcom/sm6150.dtsi +38 −0 Original line number Diff line number Diff line Loading @@ -26,6 +26,7 @@ compatible = "arm,armv8"; reg = <0x0 0x0>; enable-method = "psci"; cpu-idle-states = <&SLVR_OFF &SLVR_RAIL_OFF>; capacity-dmips-mhz = <1024>; cache-size = <0x8000>; next-level-cache = <&L2_0>; Loading Loading @@ -63,6 +64,7 @@ compatible = "arm,armv8"; reg = <0x0 0x100>; enable-method = "psci"; cpu-idle-states = <&SLVR_OFF &SLVR_RAIL_OFF>; capacity-dmips-mhz = <1024>; cache-size = <0x8000>; next-level-cache = <&L2_100>; Loading Loading @@ -95,6 +97,7 @@ compatible = "arm,armv8"; reg = <0x0 0x200>; enable-method = "psci"; cpu-idle-states = <&SLVR_OFF &SLVR_RAIL_OFF>; capacity-dmips-mhz = <1024>; cache-size = <0x8000>; next-level-cache = <&L2_200>; Loading Loading @@ -126,6 +129,7 @@ compatible = "arm,armv8"; reg = <0x0 0x300>; enable-method = "psci"; cpu-idle-states = <&SLVR_OFF &SLVR_RAIL_OFF>; capacity-dmips-mhz = <1024>; cache-size = <0x8000>; next-level-cache = <&L2_300>; Loading Loading @@ -157,6 +161,7 @@ compatible = "arm,armv8"; reg = <0x0 0x400>; enable-method = "psci"; cpu-idle-states = <&SLVR_OFF &SLVR_RAIL_OFF>; capacity-dmips-mhz = <1024>; cache-size = <0x8000>; next-level-cache = <&L2_400>; Loading Loading @@ -188,6 +193,7 @@ compatible = "arm,armv8"; reg = <0x0 0x500>; enable-method = "psci"; cpu-idle-states = <&SLVR_OFF &SLVR_RAIL_OFF>; capacity-dmips-mhz = <1024>; cache-size = <0x8000>; next-level-cache = <&L2_500>; Loading Loading @@ -219,6 +225,7 @@ compatible = "arm,armv8"; reg = <0x0 0x600>; enable-method = "psci"; cpu-idle-states = <&GOLD_OFF &GOLD_RAIL_OFF>; capacity-dmips-mhz = <1740>; cache-size = <0x10000>; next-level-cache = <&L2_600>; Loading Loading @@ -259,6 +266,7 @@ compatible = "arm,armv8"; reg = <0x0 0x700>; enable-method = "psci"; cpu-idle-states = <&GOLD_OFF &GOLD_RAIL_OFF>; capacity-dmips-mhz = <1740>; cache-size = <0x10000>; next-level-cache = <&L2_700>; Loading Loading @@ -362,6 +370,12 @@ reg = <0x0 0x85e00000 0x0 0x140000>; }; aop_cmd_db: memory@85f20000 { compatible = "qcom,cmd-db"; reg = <0x0 0x85f20000 0x0 0x20000>; no-map; }; sec_apps_mem: sec_apps_region@85fff000 { no-map; reg = <0x0 0x85fff000 0x0 0x1000>; Loading Loading @@ -592,6 +606,15 @@ }; }; pdc: interrupt-controller@b220000 { compatible = "qcom,sm6150-pdc"; reg = <0xb220000 0x30000>, <0x17c000f0 0x60>; qcom,pdc-ranges = <0 480 94>, <94 609 31>, <125 63 1>; #interrupt-cells = <2>; interrupt-parent = <&intc>; interrupt-controller; }; qcom,msm-imem@146aa000 { compatible = "qcom,msm-imem"; reg = <0x146aa000 0x1000>; Loading Loading @@ -677,7 +700,22 @@ compatible = "qcom,system-pm"; }; }; disp_rsc: rsc@af20000 { label = "disp_rsc"; compatible = "qcom,rpmh-rsc"; reg = <0xaf20000 0x10000>; reg-names = "drv-0"; interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>; qcom,tcs-offset = <0x1c00>; qcom,drv-id = <0>; qcom,tcs-config = <SLEEP_TCS 1>, <WAKE_TCS 1>, <ACTIVE_TCS 2>, <CONTROL_TCS 0>; }; }; #include "sm6150-qupv3.dtsi" #include "sm6150-pinctrl.dtsi" #include "sm6150-pm.dtsi" Loading
qcom/sm6150-pinctrl.dtsi +10 −1 Original line number Diff line number Diff line Loading @@ -3,11 +3,20 @@ compatible = "qcom,sm6150-pinctrl"; reg = <0x03000000 0xdc2000>, <0x17c000f0 0x50>; reg-names = "pinctrl", "spi_cfg"; interrupts = <0 208 0>; interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; wakeup-parent = <&pdc>; ufs_dev_reset_assert: ufs_dev_reset_assert { config { Loading
qcom/sm6150-pm.dtsi 0 → 100644 +174 −0 Original line number Diff line number Diff line &soc { qcom,lpm-levels { compatible = "qcom,lpm-levels"; #address-cells = <1>; #size-cells = <0>; qcom,pm-cluster@0 { reg = <0>; #address-cells = <1>; #size-cells = <0>; idle-state-name = "L3"; qcom,psci-mode-shift = <4>; qcom,psci-mode-mask = <0xfff>; CLUSTER_WFI: qcom,pm-cluster-level@0 { /* D1 */ reg = <0>; compatible = "arm,idle-state"; idle-state-name = "l3-wfi"; entry-latency-us = <660>; exit-latency-us = <600>; min-residency-us = <1260>; arm,psci-suspend-param = <0x10>; qcom,psci-mode = <0x1>; }; CLUSTER_OFF: qcom,pm-cluster-level@1 { /* D4 */ reg = <1>; compatible = "arm,idle-state"; idle-state-name = "l3-pc"; entry-latency-us = <2752>; exit-latency-us = <3048>; min-residency-us = <6118>; arm,psci-suspend-param = <0x40>; qcom,psci-mode = <0x4>; qcom,is-reset; qcom,min-child-idx = <2>; }; CX_RET: qcom,pm-cluster-level@2 { /* Cx Ret */ reg = <2>; compatible = "arm,idle-state"; idle-state-name = "cx-ret"; entry-latency-us = <3263>; exit-latency-us = <4562>; min-residency-us = <8467>; arm,psci-suspend-param = <0x1240>; qcom,psci-mode = <0x124>; qcom,is-reset; qcom,notify-rpm; qcom,min-child-idx = <2>; }; LLCC_OFF: qcom,pm-cluster-level@3 { /* AOSS sleep */ reg = <3>; compatible = "arm,idle-state"; idle-state-name = "llcc-off"; entry-latency-us = <3638>; exit-latency-us = <6562>; min-residency-us = <9826>; arm,psci-suspend-param = <0xb240>; qcom,psci-mode = <0xb24>; qcom,is-reset; qcom,notify-rpm; qcom,min-child-idx = <2>; }; qcom,pm-cpu@0 { reg = <0>; #address-cells = <1>; #size-cells = <0>; qcom,psci-mode-shift = <0>; qcom,psci-mode-mask = <0xf>; qcom,cpu = <&CPU0 &CPU1 &CPU2 &CPU3 &CPU4 &CPU5>; SLVR_WFI: qcom,pm-cpu-level@0 { /* C1 */ reg = <0>; compatible = "arm,idle-state"; idle-state-name = "wfi"; entry-latency-us = <61>; exit-latency-us = <60>; min-residency-us = <121>; arm,psci-suspend-param = <0x1>; qcom,psci-cpu-mode = <0x1>; }; SLVR_OFF: qcom,pm-cpu-level@1 { /* C3 */ reg = <1>; compatible = "arm,idle-state"; idle-state-name = "pc"; entry-latency-us = <549>; exit-latency-us = <901>; min-residency-us = <1774>; arm,psci-suspend-param = <0x40000003>; qcom,psci-cpu-mode = <0x3>; local-timer-stop; qcom,is-reset; qcom,use-broadcast-timer; }; SLVR_RAIL_OFF: qcom,pm-cpu-level@2 { /* C4 */ reg = <2>; compatible = "arm,idle-state"; idle-state-name = "rail-pc"; entry-latency-us = <702>; exit-latency-us = <915>; min-residency-us = <4001>; arm,psci-suspend-param = <0x40000004>; qcom,psci-cpu-mode = <0x4>; local-timer-stop; qcom,is-reset; qcom,use-broadcast-timer; }; }; qcom,pm-cpu@1 { reg = <1>; #address-cells = <1>; #size-cells = <0>; qcom,psci-mode-shift = <0>; qcom,psci-mode-mask = <0xf>; qcom,cpu = <&CPU6 &CPU7>; GOLD_WFI: qcom,pm-cpu-level@0 { /* C1 */ reg = <0>; compatible = "arm,idle-state"; idle-state-name = "wfi"; entry-latency-us = <55>; exit-latency-us = <66>; min-residency-us = <121>; arm,psci-suspend-param = <0x1>; qcom,psci-cpu-mode = <0x1>; }; GOLD_OFF: qcom,pm-cpu-level@1 { /* C3 */ reg = <1>; compatible = "arm,idle-state"; idle-state-name = "pc"; entry-latency-us = <523>; exit-latency-us = <1244>; min-residency-us = <2207>; arm,psci-suspend-param = <0x40000003>; qcom,psci-cpu-mode = <0x3>; local-timer-stop; qcom,is-reset; qcom,use-broadcast-timer; }; GOLD_RAIL_OFF: qcom,pm-cpu-level@2 { /* C4 */ reg = <2>; compatible = "arm,idle-state"; idle-state-name = "rail-pc"; entry-latency-us = <526>; exit-latency-us = <1854>; min-residency-us = <5555>; arm,psci-suspend-param = <0x40000004>; qcom,psci-cpu-mode = <0x4>; local-timer-stop; qcom,is-reset; qcom,use-broadcast-timer; }; }; }; }; rpmh-master-stats@b221200 { compatible = "qcom,rpmh-master-stats-v1"; reg = <0xb221200 0x60>; }; soc-sleep-stats@c3f0000 { compatible = "qcom,rpmh-sleep-stats"; reg = <0xc3f0000 0x400>; }; };
qcom/sm6150.dtsi +38 −0 Original line number Diff line number Diff line Loading @@ -26,6 +26,7 @@ compatible = "arm,armv8"; reg = <0x0 0x0>; enable-method = "psci"; cpu-idle-states = <&SLVR_OFF &SLVR_RAIL_OFF>; capacity-dmips-mhz = <1024>; cache-size = <0x8000>; next-level-cache = <&L2_0>; Loading Loading @@ -63,6 +64,7 @@ compatible = "arm,armv8"; reg = <0x0 0x100>; enable-method = "psci"; cpu-idle-states = <&SLVR_OFF &SLVR_RAIL_OFF>; capacity-dmips-mhz = <1024>; cache-size = <0x8000>; next-level-cache = <&L2_100>; Loading Loading @@ -95,6 +97,7 @@ compatible = "arm,armv8"; reg = <0x0 0x200>; enable-method = "psci"; cpu-idle-states = <&SLVR_OFF &SLVR_RAIL_OFF>; capacity-dmips-mhz = <1024>; cache-size = <0x8000>; next-level-cache = <&L2_200>; Loading Loading @@ -126,6 +129,7 @@ compatible = "arm,armv8"; reg = <0x0 0x300>; enable-method = "psci"; cpu-idle-states = <&SLVR_OFF &SLVR_RAIL_OFF>; capacity-dmips-mhz = <1024>; cache-size = <0x8000>; next-level-cache = <&L2_300>; Loading Loading @@ -157,6 +161,7 @@ compatible = "arm,armv8"; reg = <0x0 0x400>; enable-method = "psci"; cpu-idle-states = <&SLVR_OFF &SLVR_RAIL_OFF>; capacity-dmips-mhz = <1024>; cache-size = <0x8000>; next-level-cache = <&L2_400>; Loading Loading @@ -188,6 +193,7 @@ compatible = "arm,armv8"; reg = <0x0 0x500>; enable-method = "psci"; cpu-idle-states = <&SLVR_OFF &SLVR_RAIL_OFF>; capacity-dmips-mhz = <1024>; cache-size = <0x8000>; next-level-cache = <&L2_500>; Loading Loading @@ -219,6 +225,7 @@ compatible = "arm,armv8"; reg = <0x0 0x600>; enable-method = "psci"; cpu-idle-states = <&GOLD_OFF &GOLD_RAIL_OFF>; capacity-dmips-mhz = <1740>; cache-size = <0x10000>; next-level-cache = <&L2_600>; Loading Loading @@ -259,6 +266,7 @@ compatible = "arm,armv8"; reg = <0x0 0x700>; enable-method = "psci"; cpu-idle-states = <&GOLD_OFF &GOLD_RAIL_OFF>; capacity-dmips-mhz = <1740>; cache-size = <0x10000>; next-level-cache = <&L2_700>; Loading Loading @@ -362,6 +370,12 @@ reg = <0x0 0x85e00000 0x0 0x140000>; }; aop_cmd_db: memory@85f20000 { compatible = "qcom,cmd-db"; reg = <0x0 0x85f20000 0x0 0x20000>; no-map; }; sec_apps_mem: sec_apps_region@85fff000 { no-map; reg = <0x0 0x85fff000 0x0 0x1000>; Loading Loading @@ -592,6 +606,15 @@ }; }; pdc: interrupt-controller@b220000 { compatible = "qcom,sm6150-pdc"; reg = <0xb220000 0x30000>, <0x17c000f0 0x60>; qcom,pdc-ranges = <0 480 94>, <94 609 31>, <125 63 1>; #interrupt-cells = <2>; interrupt-parent = <&intc>; interrupt-controller; }; qcom,msm-imem@146aa000 { compatible = "qcom,msm-imem"; reg = <0x146aa000 0x1000>; Loading Loading @@ -677,7 +700,22 @@ compatible = "qcom,system-pm"; }; }; disp_rsc: rsc@af20000 { label = "disp_rsc"; compatible = "qcom,rpmh-rsc"; reg = <0xaf20000 0x10000>; reg-names = "drv-0"; interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>; qcom,tcs-offset = <0x1c00>; qcom,drv-id = <0>; qcom,tcs-config = <SLEEP_TCS 1>, <WAKE_TCS 1>, <ACTIVE_TCS 2>, <CONTROL_TCS 0>; }; }; #include "sm6150-qupv3.dtsi" #include "sm6150-pinctrl.dtsi" #include "sm6150-pm.dtsi"