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Commit 74fe39ab authored by Laurent Pinchart's avatar Laurent Pinchart Committed by Simon Horman
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arm64: dts: renesas: r8a77990: ebisu: Enable VGA and HDMI outputs



Add the LVDS decoder, HDMI encoder, VGA encoder and HDMI and VGA
connectors, and wire up the display-related nodes with clocks, pinmux
and regulators.

The LVDS0 and LVDS1 encoders can use the DU_DOTCLKIN0, DU_DOTCLKIN1 and
EXTAL externals clocks. Two of them are provided to the SoC on the Ebisu
board, hook them up in DT.

Signed-off-by: default avatarLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: default avatarJacopo Mondi <jacopo+renesas@jmondi.org>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 0dc73398
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+162 −0
Original line number Diff line number Diff line
@@ -51,6 +51,88 @@
			};
		};
	};

	hdmi-out {
		compatible = "hdmi-connector";
		type = "a";

		port {
			hdmi_con_out: endpoint {
				remote-endpoint = <&adv7511_out>;
			};
		};
	};

	lvds-decoder {
		compatible = "thine,thc63lvd1024";
		vcc-supply = <&reg_3p3v>;

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				thc63lvd1024_in: endpoint {
					remote-endpoint = <&lvds0_out>;
				};
			};

			port@2 {
				reg = <2>;
				thc63lvd1024_out: endpoint {
					remote-endpoint = <&adv7511_in>;
				};
			};
		};
	};

	vga {
		compatible = "vga-connector";

		port {
			vga_in: endpoint {
				remote-endpoint = <&adv7123_out>;
			};
		};
	};

	vga-encoder {
		compatible = "adi,adv7123";

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				adv7123_in: endpoint {
					remote-endpoint = <&du_out_rgb>;
				};
			};
			port@1 {
				reg = <1>;
				adv7123_out: endpoint {
					remote-endpoint = <&vga_in>;
				};
			};
		};
	};

	reg_3p3v: regulator1 {
		compatible = "regulator-fixed";
		regulator-name = "fixed-3.3V";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;
		regulator-always-on;
	};

	x13_clk: x13 {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <74250000>;
	};
};

&avb {
@@ -86,6 +168,25 @@
	};
};

&du {
	pinctrl-0 = <&du_pins>;
	pinctrl-names = "default";
	status = "okay";

	clocks = <&cpg CPG_MOD 724>,
		 <&cpg CPG_MOD 723>,
		 <&x13_clk>;
	clock-names = "du.0", "du.1", "dclkin.0";

	ports {
		port@0 {
			endpoint {
				remote-endpoint = <&adv7123_in>;
			};
		};
	};
};

&ehci0 {
	status = "okay";
};
@@ -97,6 +198,38 @@
&i2c0 {
	status = "okay";

	hdmi-encoder@39 {
		compatible = "adi,adv7511w";
		reg = <0x39>;
		interrupt-parent = <&gpio1>;
		interrupts = <1 IRQ_TYPE_LEVEL_LOW>;

		adi,input-depth = <8>;
		adi,input-colorspace = "rgb";
		adi,input-clock = "1x";
		adi,input-style = <1>;
		adi,input-justification = "evenly";

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				adv7511_in: endpoint {
					remote-endpoint = <&thc63lvd1024_out>;
				};
			};

			port@1 {
				reg = <1>;
				adv7511_out: endpoint {
					remote-endpoint = <&hdmi_con_out>;
				};
			};
		};
	};

	video-receiver@70 {
		compatible = "adi,adv7482";
		reg = <0x70>;
@@ -137,6 +270,30 @@
	};
};

&lvds0 {
	status = "okay";

	clocks = <&cpg CPG_MOD 727>,
		 <&x13_clk>,
		 <&extal_clk>;
	clock-names = "fck", "dclkin.0", "extal";

	ports {
		port@1 {
			lvds0_out: endpoint {
				remote-endpoint = <&thc63lvd1024_in>;
			};
		};
	};
};

&lvds1 {
	clocks = <&cpg CPG_MOD 727>,
		 <&x13_clk>,
		 <&extal_clk>;
	clock-names = "fck", "dclkin.0", "extal";
};

&ohci0 {
	status = "okay";
};
@@ -149,6 +306,11 @@
		};
	};

	du_pins: du {
		groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
		function = "du";
	};

	pwm3_pins: pwm3 {
		groups = "pwm3_b";
		function = "pwm3";