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Commit 7411202a authored by Bjorn Helgaas's avatar Bjorn Helgaas Committed by Greg Kroah-Hartman
Browse files

PCI/ASPM: Return 0 or -ETIMEDOUT from pcie_retrain_link() 

[ Upstream commit f5297a01ee805d7fa569d288ed65fc0f9ac9b03d ]

"pcie_retrain_link" is not a question with a true/false answer, so "bool"
isn't quite the right return type.  Return 0 for success or -ETIMEDOUT if
the retrain failed.  No functional change intended.

[bhelgaas: based on Ilpo's patch below]
Link: https://lore.kernel.org/r/20230502083923.34562-1-ilpo.jarvinen@linux.intel.com


Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Stable-dep-of: e7e39756363a ("PCI/ASPM: Avoid link retraining race")
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent 8eb15ff2

drivers/pci/pcie/aspm.c

+11 −9
Original line number Diff line number Diff line
@@ -200,7 +200,7 @@ static void pcie_clkpm_cap_init(struct pcie_link_state *link, int blacklist) 
	link->clkpm_disable = blacklist ? 1 : 0;

}



static bool pcie_retrain_link(struct pcie_link_state *link)

static int pcie_retrain_link(struct pcie_link_state *link)

{

	struct pci_dev *parent = link->pdev;

	unsigned long end_jiffies;
@@ -227,7 +227,9 @@ static bool pcie_retrain_link(struct pcie_link_state *link) 
			break;

		msleep(1);

	} while (time_before(jiffies, end_jiffies));

	return !(reg16 & PCI_EXP_LNKSTA_LT);

	if (reg16 & PCI_EXP_LNKSTA_LT)

		return -ETIMEDOUT;

	return 0;

}



/*
@@ -296,8 +298,7 @@ static void pcie_aspm_configure_common_clock(struct pcie_link_state *link) 
		reg16 &= ~PCI_EXP_LNKCTL_CCC;

	pcie_capability_write_word(parent, PCI_EXP_LNKCTL, reg16);



	if (pcie_retrain_link(link))

		return;

	if (pcie_retrain_link(link)) {



		/* Training failed. Restore common clock configurations */

		pci_err(parent, "ASPM: Could not configure common clock\n");
@@ -306,6 +307,7 @@ static void pcie_aspm_configure_common_clock(struct pcie_link_state *link) 
					   child_reg[PCI_FUNC(child->devfn)]);

		pcie_capability_write_word(parent, PCI_EXP_LNKCTL, parent_reg);

	}

}



/* Convert L0s latency encoding to ns */

static u32 calc_l0s_latency(u32 encoding)