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Commit 7404db67 authored by Pranav Patel's avatar Pranav Patel
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ARM: dts: msm: Add apb_pclk to GMU clock list for Lahaina 

apb_pclk is required to access QDSS registers. GMU need to add vote
before access can be made.

Change-Id: I36f27809824f1b3d09dd55f19080e9f40edb692a
parent 020b7178

qcom/lahaina-gpu.dtsi

+3 −2
Original line number Diff line number Diff line
@@ -270,10 +270,11 @@ 
			<&clock_gcc GCC_DDRSS_GPU_AXI_CLK>,

			<&clock_gcc GCC_GPU_MEMNOC_GFX_CLK>,

			<&clock_gpucc GPU_CC_AHB_CLK>,

			<&clock_gpucc GPU_CC_HUB_CX_INT_CLK>;

			<&clock_gpucc GPU_CC_HUB_CX_INT_CLK>,

			<&clock_aop QDSS_CLK>;



		clock-names = "gmu_clk", "cxo_clk", "axi_clk",

			"memnoc_clk", "ahb_clk", "hub_clk";

			"memnoc_clk", "ahb_clk", "hub_clk", "apb_pclk";



		mboxes = <&qmp_aop 0>;

		mbox-names = "aop";