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Commit 73e467f6 authored by Rob Herring's avatar Rob Herring
Browse files

drm/panfrost: Consolidate reset handling 



Runtime PM resume and job timeouts both call the same sequence of
functions, so consolidate them to a common function. This will make
changing the reset related code easier. The MMU also needs some
re-initialization on reset, so rework its call. In the process, we
hide the address space details within the MMU code in preparation to
support multiple address spaces.

Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: Robin Murphy <robin.murphy@arm.com>
Cc: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: default avatarSteven Price <steven.price@arm.com>
Signed-off-by: default avatarRob Herring <robh@kernel.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20190808222200.13176-7-robh@kernel.org
parent 203270c0

drivers/gpu/drm/panfrost/panfrost_device.c

+10 −6
Original line number Diff line number Diff line
@@ -254,18 +254,22 @@ const char *panfrost_exception_name(struct panfrost_device *pfdev, u32 exception 
	return "UNKNOWN";

}



void panfrost_device_reset(struct panfrost_device *pfdev)

{

	panfrost_gpu_soft_reset(pfdev);



	panfrost_gpu_power_on(pfdev);

	panfrost_mmu_reset(pfdev);

	panfrost_job_enable_interrupts(pfdev);

}



#ifdef CONFIG_PM

int panfrost_device_resume(struct device *dev)

{

	struct platform_device *pdev = to_platform_device(dev);

	struct panfrost_device *pfdev = platform_get_drvdata(pdev);



	panfrost_gpu_soft_reset(pfdev);



	/* TODO: Re-enable all other address spaces */

	panfrost_gpu_power_on(pfdev);

	panfrost_mmu_enable(pfdev, 0);

	panfrost_job_enable_interrupts(pfdev);

	panfrost_device_reset(pfdev);

	panfrost_devfreq_resume(pfdev);



	return 0;

drivers/gpu/drm/panfrost/panfrost_device.h

+1 −0
Original line number Diff line number Diff line
@@ -132,6 +132,7 @@ int panfrost_unstable_ioctl_check(void); 


int panfrost_device_init(struct panfrost_device *pfdev);

void panfrost_device_fini(struct panfrost_device *pfdev);

void panfrost_device_reset(struct panfrost_device *pfdev);



int panfrost_device_resume(struct device *dev);

int panfrost_device_suspend(struct device *dev);

drivers/gpu/drm/panfrost/panfrost_job.c

+1 −6
Original line number Diff line number Diff line
@@ -395,12 +395,7 @@ static void panfrost_job_timedout(struct drm_sched_job *sched_job) 
	/* panfrost_core_dump(pfdev); */



	panfrost_devfreq_record_transition(pfdev, js);

	panfrost_gpu_soft_reset(pfdev);



	/* TODO: Re-enable all other address spaces */

	panfrost_mmu_enable(pfdev, 0);

	panfrost_gpu_power_on(pfdev);

	panfrost_job_enable_interrupts(pfdev);

	panfrost_device_reset(pfdev);



	for (i = 0; i < NUM_JOB_SLOTS; i++)

		drm_sched_resubmit_jobs(&pfdev->js->queue[i].sched);

drivers/gpu/drm/panfrost/panfrost_mmu.c

+9 −7
Original line number Diff line number Diff line
@@ -105,15 +105,12 @@ static int mmu_hw_do_operation(struct panfrost_device *pfdev, u32 as_nr, 
	return ret;

}



void panfrost_mmu_enable(struct panfrost_device *pfdev, u32 as_nr)

static void panfrost_mmu_enable(struct panfrost_device *pfdev, u32 as_nr)

{

	struct io_pgtable_cfg *cfg = &pfdev->mmu->pgtbl_cfg;

	u64 transtab = cfg->arm_mali_lpae_cfg.transtab;

	u64 memattr = cfg->arm_mali_lpae_cfg.memattr;



	mmu_write(pfdev, MMU_INT_CLEAR, ~0);

	mmu_write(pfdev, MMU_INT_MASK, ~0);



	mmu_write(pfdev, AS_TRANSTAB_LO(as_nr), transtab & 0xffffffffUL);

	mmu_write(pfdev, AS_TRANSTAB_HI(as_nr), transtab >> 32);
@@ -137,6 +134,14 @@ static void mmu_disable(struct panfrost_device *pfdev, u32 as_nr) 
	write_cmd(pfdev, as_nr, AS_COMMAND_UPDATE);

}



void panfrost_mmu_reset(struct panfrost_device *pfdev)

{

	panfrost_mmu_enable(pfdev, 0);



	mmu_write(pfdev, MMU_INT_CLEAR, ~0);

	mmu_write(pfdev, MMU_INT_MASK, ~0);

}



static size_t get_pgsize(u64 addr, size_t size)

{

	if (addr & (SZ_2M - 1) || size < SZ_2M)
@@ -375,9 +380,6 @@ int panfrost_mmu_init(struct panfrost_device *pfdev) 
		dev_err(pfdev->dev, "failed to request mmu irq");

		return err;

	}

	mmu_write(pfdev, MMU_INT_CLEAR, ~0);

	mmu_write(pfdev, MMU_INT_MASK, ~0);



	pfdev->mmu->pgtbl_cfg = (struct io_pgtable_cfg) {

		.pgsize_bitmap	= SZ_4K | SZ_2M,

		.ias		= FIELD_GET(0xff, pfdev->features.mmu_features),

drivers/gpu/drm/panfrost/panfrost_mmu.h

+1 −2
Original line number Diff line number Diff line
@@ -11,7 +11,6 @@ void panfrost_mmu_unmap(struct panfrost_gem_object *bo); 


int panfrost_mmu_init(struct panfrost_device *pfdev);

void panfrost_mmu_fini(struct panfrost_device *pfdev);



void panfrost_mmu_enable(struct panfrost_device *pfdev, u32 as_nr);

void panfrost_mmu_reset(struct panfrost_device *pfdev);



#endif