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Commit 73b5ea97 authored by Mike Tipton's avatar Mike Tipton
Browse files

clk: qcom: clk-alpha-pll: Add lucid_5lpe support for bypassing latch 



Some PLL instances don't have a fully functional latch interface and
it's not strictly required in all circumstances. So add support for
bypassing it.

Change-Id: I60c319c0f50c8eca159afa32ee3cbd83bb1af510
Signed-off-by: default avatarMike Tipton <mdtipton@codeaurora.org>
parent b8bf0ad2

drivers/clk/qcom/clk-alpha-pll.c

+24 −18
Original line number Diff line number Diff line
@@ -272,6 +272,7 @@ EXPORT_SYMBOL_GPL(clk_alpha_pll_regs); 
#define LUCID_5LPE_PCAL_DONE		BIT(11)

#define LUCID_5LPE_PLL_LATCH_INPUT	BIT(14)

#define LUCID_5LPE_ALPHA_PLL_ACK_LATCH	BIT(13)

#define LUCID_5LPE_BYPASS_LATCH		BIT(10)

#define LUCID_EVO_PCAL_NOT_DONE		BIT(8)

#define LUCID_EVO_PLL_L_VAL_MASK	GENMASK(15, 0)

#define LUCID_EVO_PLL_CAL_L_VAL_MASK	GENMASK(31, 16)
@@ -3171,6 +3172,10 @@ static int alpha_pll_lucid_5lpe_set_rate(struct clk_hw *hw, unsigned long rate, 
	regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);

	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);



	if (pll->flags & BYPASS_LATCH) {

		regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL_U(pll),

				   LUCID_5LPE_BYPASS_LATCH, LUCID_5LPE_BYPASS_LATCH);

	} else {

		/* Latch the PLL input */

		ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll),

				LUCID_5LPE_PLL_LATCH_INPUT, LUCID_5LPE_PLL_LATCH_INPUT);
@@ -3191,6 +3196,7 @@ static int alpha_pll_lucid_5lpe_set_rate(struct clk_hw *hw, unsigned long rate, 
				LUCID_5LPE_PLL_LATCH_INPUT, 0);

		if (ret)

			return ret;

	}



	if (clk_hw_is_enabled(hw)) {

		ret = wait_for_pll_enable_lock(pll);

drivers/clk/qcom/clk-alpha-pll.h

+1 −0
Original line number Diff line number Diff line
@@ -94,6 +94,7 @@ struct clk_alpha_pll { 
#define SUPPORTS_DYNAMIC_UPDATE	BIT(3)

#define SUPPORTS_FSM_LEGACY_MODE BIT(4)

#define SUPPORTS_SLEW           BIT(4)

#define BYPASS_LATCH		BIT(6)

	u8 flags;



	struct clk_regmap clkr;