Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 72e9584e authored by Raghavendra Rao Ananta's avatar Raghavendra Rao Ananta
Browse files

drivers: llcc: Add LLCC driver for Lahaina 



Add Last Level Cache Controller (LLCC) driver for Lahaina platform.

Change-Id: I4217c96287059a2621dc17c749381d5db16220d0
Signed-off-by: default avatarRaghavendra Rao Ananta <rananta@codeaurora.org>
parent a3b9d216

drivers/soc/qcom/Kconfig

+9 −0
Original line number Diff line number Diff line
@@ -50,6 +50,15 @@ config QCOM_LLCC 
	  to clients that use the LLCC. Say yes here to enable LLCC slice

	  driver.



config QCOM_LAHAINA_LLCC

	tristate "Qualcomm Technologies, Inc. LAHAINA LLCC driver"

	depends on QCOM_LLCC

	help

	  Say y or m here to enable the LLCC driver for Lahaina platform.

	  This provides data required to configure LLCC so that clients

	  can start using the LLCC slices.

	  If unsure, say n.



config QCOM_SDM845_LLCC

	tristate "Qualcomm Technologies, Inc. SDM845 LLCC driver"

	depends on QCOM_LLCC

drivers/soc/qcom/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -22,6 +22,7 @@ obj-$(CONFIG_QCOM_SECURE_CHAN_MANAGER) += scm.o 
obj-$(CONFIG_QCOM_WCNSS_CTRL) += wcnss_ctrl.o

obj-$(CONFIG_QCOM_APR) += apr.o

obj-$(CONFIG_QCOM_LLCC) += llcc-slice.o

obj-$(CONFIG_QCOM_LAHAINA_LLCC) += llcc-lahaina.o

obj-$(CONFIG_QCOM_SDM845_LLCC) += llcc-sdm845.o

obj-$(CONFIG_QCOM_RPMHPD) += rpmhpd.o

obj-$(CONFIG_QCOM_RPMPD) += rpmpd.o

drivers/soc/qcom/llcc-lahaina.c

0 → 100644
+97 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/*

 * Copyright (c) 2019, The Linux Foundation. All rights reserved.

 *

 */



#include <linux/kernel.h>

#include <linux/module.h>

#include <linux/of.h>

#include <linux/platform_device.h>

#include <linux/soc/qcom/llcc-qcom.h>



/*

 * SCT entry contains of the following parameters

 * uid: Unique id for the client's use case

 * slice_id: llcc slice id for each client

 * max_cap: The maximum capacity of the cache slice provided in KB

 * priority: Priority of the client used to select victim line for replacement

 * fixed_size: Determine of the slice has a fixed capacity

 * bonus_ways: Bonus ways to be used by any slice, bonus way is used only if

 *             it't not a reserved way.

 * res_ways: Reserved ways for the cache slice, the reserved ways cannot be used

 *           by any other client than the one its assigned to.

 * cache_mode: Each slice operates as a cache, this controls the mode of the

 *             slice normal or TCM

 * probe_target_ways: Determines what ways to probe for access hit. When

 *                    configured to 1 only bonus and reserved ways are probed.

 *                    when configured to 0 all ways in llcc are probed.

 * dis_cap_alloc: Disable capacity based allocation for a client

 * write_scid_en: Bit enables write cache support for a given scid.

 * retain_on_pc: If this bit is set and client has maitained active vote

 *               then the ways assigned to this client are not flushed on power

 *               collapse.

 * activate_on_init: Activate the slice immidiately after the SCT is programmed

 */

#define SCT_ENTRY(uid, sid, mc, p, fs, bway, rway, cmod, ptw, dca, wse, rp, a) \

	{					\

		.usecase_id = uid,		\

		.slice_id = sid,		\

		.max_cap = mc,			\

		.priority = p,			\

		.fixed_size = fs,		\

		.bonus_ways = bway,		\

		.res_ways = rway,		\

		.cache_mode = cmod,		\

		.probe_target_ways = ptw,	\

		.dis_cap_alloc = dca,		\

		.write_scid_en = wse,		\

		.retain_on_pc = rp,		\

		.activate_on_init = a,		\

	}



static struct llcc_slice_config lahaina_data[] =  {

	SCT_ENTRY(LLCC_CPUSS,    1, 3072, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 1),

	SCT_ENTRY(LLCC_VIDSC0,   2, 512, 3, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),

	SCT_ENTRY(LLCC_AUDIO,    6, 1024, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 0, 0),

	SCT_ENTRY(LLCC_MDMHPGRW, 7, 1024, 3, 0, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),

	SCT_ENTRY(LLCC_MDM,      8, 3072, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),

	SCT_ENTRY(LLCC_MDMHW,    9, 1024, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),

	SCT_ENTRY(LLCC_CMPT,     10, 3072, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 0, 0),

	SCT_ENTRY(LLCC_GPUHTW,   11, 1024, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),

	SCT_ENTRY(LLCC_GPU,      12, 1024, 1, 0, 0xFFF, 0x0, 0, 0, 0, 1, 1, 0),

	SCT_ENTRY(LLCC_MMUHWT,   13, 1024, 1, 1, 0x0,  0x0, 0, 0, 0, 0, 0, 1),

	SCT_ENTRY(LLCC_CMPTDMA,  15, 1024, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),

	SCT_ENTRY(LLCC_DISP,     16, 3072, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),

	SCT_ENTRY(LLCC_MDMPNG,   21, 1024, 0, 1, 0xF,  0x0, 0, 0, 0, 0, 1, 0),

	SCT_ENTRY(LLCC_AUDHW,    22, 1024, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),

	SCT_ENTRY(LLCC_CVP,      28, 512, 3, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),

	SCT_ENTRY(LLCC_MDMVPE,   29, 256, 1, 1, 0xF,  0x0, 0, 0, 0, 0, 1, 0),

	SCT_ENTRY(LLCC_APTCM,    30, 1024, 3, 1, 0x0,  0x1, 1, 0, 0, 0, 1, 0),

	SCT_ENTRY(LLCC_WRTCH,    31, 512, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 0, 1),

	SCT_ENTRY(LLCC_CVPFW,    17, 512, 1, 0, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),

	SCT_ENTRY(LLCC_CPUSS1,   3, 1024, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),

};



static int lahaina_qcom_llcc_probe(struct platform_device *pdev)

{

	return qcom_llcc_probe(pdev, lahaina_data,

				 ARRAY_SIZE(lahaina_data));

}



static const struct of_device_id lahaina_qcom_llcc_of_match[] = {

	{ .compatible = "qcom,lahaina-llcc" },

	{ },

};



static struct platform_driver lahaina_qcom_llcc_driver = {

	.driver = {

		.name = "lahaina-llcc",

		.of_match_table = lahaina_qcom_llcc_of_match,

	},

	.probe = lahaina_qcom_llcc_probe,

};

module_platform_driver(lahaina_qcom_llcc_driver);



MODULE_DESCRIPTION("QCOM lahaina LLCC driver");

MODULE_LICENSE("GPL v2");