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Commit 71a32a0d authored by Maulik Shah's avatar Maulik Shah
Browse files

ARM: dts: msm: Add LPM support for sm8150 

Add PSCI and cpuidle states required for LPMs and
add bindings for RPMH, Master stats.

Change-Id: I0733490083505069254ecb1c286518e6f6aabe2d
parent 47899a78

qcom/sm8150-pm.dtsi

0 → 100644
+123 −0
Original line number Diff line number Diff line 
&soc {

	qcom,lpm-levels {

		compatible = "qcom,lpm-levels";

		#address-cells = <1>;

		#size-cells = <0>;



		qcom,pm-cluster@0 {

			reg = <0>;

			#address-cells = <1>;

			#size-cells = <0>;

			idle-state-name = "L3";

			qcom,clstr-tmr-add = <1000>;

			qcom,psci-mode-shift = <4>;

			qcom,psci-mode-mask = <0xfff>;



			CLUSTER_WFI: qcom,pm-cluster-level@0 { /* D1 */

				reg = <0>;

				compatible = "arm,idle-state";

				idle-state-name = "l3-wfi";

				entry-latency-us = <48>;

				exit-latency-us = <51>;

				min-residency-us = <99>;

				arm,psci-suspend-param = <0x10>;

				qcom,psci-mode = <0x1>;

			};



			LLCC_OFF: qcom,pm-cluster-level@1 { /* AOSS sleep */

				reg = <1>;

				compatible = "arm,idle-state";

				idle-state-name = "llcc-off";

				entry-latency-us = <3263>;

				exit-latency-us = <6562>;

				min-residency-us = <9987>;

				arm,psci-suspend-param = <0xc240>;

				qcom,psci-mode = <0xc24>;

				qcom,is-reset;

				qcom,notify-rpm;

				qcom,min-child-idx = <1>;

			};



			qcom,pm-cpu@0 {

				reg = <0>;

				#address-cells = <1>;

				#size-cells = <0>;

				qcom,psci-mode-shift = <0>;

				qcom,psci-mode-mask = <0xf>;

				qcom,ref-stddev = <500>;

				qcom,tmr-add = <1000>;

				qcom,ref-premature-cnt = <1>;

				qcom,cpu = <&CPU0 &CPU1 &CPU2 &CPU3>;



				SLVR_WFI: qcom,pm-cpu-level@0 { /* C1 */

					reg = <0>;

					compatible = "arm,idle-state";

					idle-state-name = "wfi";

					entry-latency-us = <57>;

					exit-latency-us = <43>;

					min-residency-us = <100>;

					arm,psci-suspend-param = <0x1>;

					qcom,psci-cpu-mode = <0x1>;

				};



				SLVR_RAIL_OFF: qcom,pm-cpu-level@1 {  /* C4 */

					reg = <1>;

					compatible = "arm,idle-state";

					idle-state-name = "rail-pc";

					entry-latency-us = <355>;

					exit-latency-us = <909>;

					min-residency-us = <3934>;

					arm,psci-suspend-param = <0x40000004>;

					qcom,psci-cpu-mode = <0x4>;

					local-timer-stop;

					qcom,is-reset;

					qcom,use-broadcast-timer;

				};

			};



			qcom,pm-cpu@1 {

				reg = <1>;

				#address-cells = <1>;

				#size-cells = <0>;

				qcom,psci-mode-shift = <0>;

				qcom,psci-mode-mask = <0xf>;

				qcom,cpu = <&CPU4 &CPU5 &CPU6 &CPU7>;



				GOLD_WFI: qcom,pm-cpu-level@0 { /* C1 */

					reg = <0>;

					compatible = "arm,idle-state";

					idle-state-name = "wfi";

					entry-latency-us = <57>;

					exit-latency-us = <43>;

					min-residency-us = <83>;

					arm,psci-suspend-param = <0x1>;

					qcom,psci-cpu-mode = <0x1>;

				};



				GOLD_RAIL_OFF: qcom,pm-cpu-level@1 {  /* C4 */

					reg = <1>;

					compatible = "arm,idle-state";

					idle-state-name = "rail-pc";

					entry-latency-us = <2411>;

					exit-latency-us = <1461>;

					min-residency-us = <4488>;

					arm,psci-suspend-param = <0x40000004>;

					qcom,psci-cpu-mode = <0x4>;

					local-timer-stop;

					qcom,is-reset;

					qcom,use-broadcast-timer;

				};

			};

		};

	};



	rpmh-master-stats@b221200 {

		compatible = "qcom,rpmh-master-stats-v1";

		reg = <0xb221200 0x60>;

	};



	soc-sleep-stats@c3f0000 {

		compatible = "qcom,rpmh-sleep-stats";

		reg = <0xc3f0000 0x400>;

	};

};

qcom/sm8150.dtsi

+9 −0
Original line number Diff line number Diff line
@@ -26,6 +26,7 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x0>;

			enable-method = "psci";

			cpu-idle-states = <&SLVR_RAIL_OFF>;

			capacity-dmips-mhz = <1024>;

			cache-size = <0x8000>;

			next-level-cache = <&L2_0>;
@@ -62,6 +63,7 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x100>;

			enable-method = "psci";

			cpu-idle-states = <&SLVR_RAIL_OFF>;

			capacity-dmips-mhz = <1024>;

			cache-size = <0x8000>;

			next-level-cache = <&L2_1>;
@@ -92,6 +94,7 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x200>;

			enable-method = "psci";

			cpu-idle-states = <&SLVR_RAIL_OFF>;

			capacity-dmips-mhz = <1024>;

			cache-size = <0x8000>;

			next-level-cache = <&L2_2>;
@@ -122,6 +125,7 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x300>;

			enable-method = "psci";

			cpu-idle-states = <&SLVR_RAIL_OFF>;

			capacity-dmips-mhz = <1024>;

			cache-size = <0x8000>;

			next-level-cache = <&L2_3>;
@@ -152,6 +156,7 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x400>;

			enable-method = "psci";

			cpu-idle-states = <&GOLD_RAIL_OFF>;

			capacity-dmips-mhz = <1740>;

			cache-size = <0x20000>;

			next-level-cache = <&L2_4>;
@@ -191,6 +196,7 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x500>;

			enable-method = "psci";

			cpu-idle-states = <&GOLD_RAIL_OFF>;

			capacity-dmips-mhz = <1740>;

			cache-size = <0x20000>;

			next-level-cache = <&L2_5>;
@@ -230,6 +236,7 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x600>;

			enable-method = "psci";

			cpu-idle-states = <&GOLD_RAIL_OFF>;

			capacity-dmips-mhz = <1740>;

			cache-size = <0x20000>;

			next-level-cache = <&L2_6>;
@@ -269,6 +276,7 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x700>;

			enable-method = "psci";

			cpu-idle-states = <&GOLD_RAIL_OFF>;

			capacity-dmips-mhz = <1740>;

			cache-size = <0x20000>;

			next-level-cache = <&L2_7>;
@@ -743,3 +751,4 @@ 


#include "sm8150-pinctrl.dtsi"

#include "sm8150-regulator.dtsi"

#include "sm8150-pm.dtsi"