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Commit 716345f1 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
Browse files

Merge "ARM: dts: msm: Add node for memory dump driver for SDMSHRIKE"

parents a454e469 8b8279e0

qcom/sdmshrike.dtsi

+136 −80
Original line number Diff line number Diff line
@@ -65,16 +65,6 @@ 
				      cache-level = <3>;

				};

			};



			L1_I_0: l1-icache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0xa000>;

			};



			L1_D_0: l1-dcache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0xa000>;

			};

		};



		CPU1: cpu@100 {
@@ -93,16 +83,6 @@ 
			      cache-level = <2>;

			      next-level-cache = <&L3_0>;

			};



			L1_I_100: l1-icache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0xa000>;

			};



			L1_D_100: l1-dcache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0xa000>;

			};

		};



		CPU2: cpu@200 {
@@ -121,16 +101,6 @@ 
			      cache-level = <2>;

			      next-level-cache = <&L3_0>;

			};



			L1_I_200: l1-icache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0xa000>;

			};



			L1_D_200: l1-dcache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0xa000>;

			};

		};



		CPU3: cpu@300 {
@@ -149,16 +119,6 @@ 
			      cache-level = <2>;

			      next-level-cache = <&L3_0>;

			};



			L1_I_300: l1-icache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0xa000>;

			};



			L1_D_300: l1-dcache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0xa000>;

			};

		};



		CPU4: cpu@400 {
@@ -177,16 +137,6 @@ 
			      cache-level = <2>;

			      next-level-cache = <&L3_0>;

			};



			L1_I_400: l1-icache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x14000>;

			};



			L1_D_400: l1-dcache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x14000>;

			};

		};



		CPU5: cpu@500 {
@@ -205,16 +155,6 @@ 
			      cache-level = <2>;

			      next-level-cache = <&L3_0>;

			};



			L1_I_500: l1-icache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x14000>;

			};



			L1_D_500: l1-dcache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x14000>;

			};

		};



		CPU6: cpu@600 {
@@ -233,16 +173,6 @@ 
			      cache-level = <2>;

			      next-level-cache = <&L3_0>;

			};



			L1_I_600: l1-icache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x14000>;

			};



			L1_D_600: l1-dcache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x14000>;

			};

		};



		CPU7: cpu@700 {
@@ -261,16 +191,6 @@ 
			      cache-level = <2>;

			      next-level-cache = <&L3_0>;

			};



			L1_I_700: l1-icache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x14000>;

			};



			L1_D_700: l1-dcache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x14000>;

			};

		};



		cpu-map {
@@ -489,6 +409,7 @@ 


		dump_mem: mem_dump_region {

			compatible = "shared-dma-pool";

			alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;

			reusable;

			size = <0 0x2400000>;

		};
@@ -860,6 +781,141 @@ 
		interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>;

	};



	mem_dump {

		compatible = "qcom,mem-dump";

		memory-region = <&dump_mem>;



		rpmh {

			qcom,dump-size = <0x2000000>;

			qcom,dump-id = <0xec>;

		};



		rpm_sw {

			qcom,dump-size = <0x28000>;

			qcom,dump-id = <0xea>;

		};



		pmic {

			qcom,dump-size = <0x80000>;

			qcom,dump-id = <0xe4>;

		};



		fcm {

			qcom,dump-size = <0x8400>;

			qcom,dump-id = <0xee>;

		};



		tmc_etf {

			qcom,dump-size = <0x10000>;

			qcom,dump-id = <0xf0>;

		};



		etf_swao {

			qcom,dump-size = <0x8400>;

			qcom,dump-id = <0xf1>;

		};



		etr_reg {

			qcom,dump-size = <0x1000>;

			qcom,dump-id = <0x100>;

		};



		etf_reg {

			qcom,dump-size = <0x1000>;

			qcom,dump-id = <0x101>;

		};



		etfswao_reg {

			qcom,dump-size = <0x1000>;

			qcom,dump-id = <0x102>;

		};



		misc_data {

			qcom,dump-size = <0x1000>;

			qcom,dump-id = <0xe8>;

		};



		l1_icache0 {

			qcom,dump-size = <0xa000>;

			qcom,dump-id = <0x60>;

		};



		l1_icache100 {

			qcom,dump-size = <0xa000>;

			qcom,dump-id = <0x61>;

		};



		l1_icache200 {

			qcom,dump-size = <0xa000>;

			qcom,dump-id = <0x62>;

		};



		l1_icache300 {

			qcom,dump-size = <0xa000>;

			qcom,dump-id = <0x63>;

		};



		l1_icache400 {

			qcom,dump-size = <0x14000>;

			qcom,dump-id = <0x64>;

		};



		l1_icache500 {

			qcom,dump-size = <0x14000>;

			qcom,dump-id = <0x65>;

		};



		l1_icache600 {

			qcom,dump-size = <0x14000>;

			qcom,dump-id = <0x66>;

		};



		l1_icache700 {

			qcom,dump-size = <0x14000>;

			qcom,dump-id = <0x67>;

		};



		l1_dcache0 {

			qcom,dump-size = <0xa000>;

			qcom,dump-id = <0x80>;

		};



		l1_dcache100 {

			qcom,dump-size = <0xa000>;

			qcom,dump-id = <0x81>;

		};



		l1_dcache200 {

			qcom,dump-size = <0xa000>;

			qcom,dump-id = <0x82>;

		};



		l1_dcache300 {

			qcom,dump-size = <0xa000>;

			qcom,dump-id = <0x83>;

		};



		l1_dcache400 {

			qcom,dump-size = <0x14000>;

			qcom,dump-id = <0x84>;

		};



		l1_dcache500 {

			qcom,dump-size = <0x14000>;

			qcom,dump-id = <0x85>;

		};



		l1_dcache600 {

			qcom,dump-size = <0x14000>;

			qcom,dump-id = <0x86>;

		};



		l1_dcache700 {

			qcom,dump-size = <0x14000>;

			qcom,dump-id = <0x87>;

		};

	};



	clocks {

		xo_board: xo-board {

			compatible = "fixed-clock";

qcom/sm8150.dtsi

+236 −148
Original line number Diff line number Diff line
@@ -65,20 +65,6 @@ 
				      cache-level = <3>;

				};

			};



			L1_I_0: l1-icache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x8800>;

			};



			L1_D_0: l1-dcache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x9000>;

			};



			L2_TLB_0: l2-tlb {

				qcom,dump-size = <0x5000>;

			};

		};



		CPU1: cpu@100 {
@@ -95,20 +81,6 @@ 
			      cache-level = <2>;

			      next-level-cache = <&L3_0>;

			};



			L1_I_100: l1-icache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x8800>;

			};



			L1_D_100: l1-dcache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x9000>;

			};



			L2_TLB_100: l2-tlb {

				qcom,dump-size = <0x5000>;

			};

		};



		CPU2: cpu@200 {
@@ -125,20 +97,6 @@ 
			      cache-level = <2>;

			      next-level-cache = <&L3_0>;

			};



			L1_I_200: l1-icache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x8800>;

			};



			L1_D_200: l1-dcache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x9000>;

			};



			L2_TLB_200: l2-tlb {

				qcom,dump-size = <0x5000>;

			};

		};



		CPU3: cpu@300 {
@@ -155,20 +113,6 @@ 
			      cache-level = <2>;

			      next-level-cache = <&L3_0>;

			};



			L1_I_300: l1-icache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x8800>;

			};



			L1_D_300: l1-dcache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x9000>;

			};



			L2_TLB_300: l2-tlb {

				qcom,dump-size = <0x5000>;

			};

		};



		CPU4: cpu@400 {
@@ -184,29 +128,6 @@ 
			      compatible = "arm,arch-cache";

			      cache-level = <2>;

			      next-level-cache = <&L3_0>;

			      qcom,dump-size = <0x88000>;

			};



			L1_I_400: l1-icache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x11000>;

			};



			L1_D_400: l1-dcache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x12000>;

			};



			L1_ITLB_400: l1-itlb {

				qcom,dump-size = <0x300>;

			};



			L1_DTLB_400: l1-dtlb {

				qcom,dump-size = <0x480>;

			};



			L2_TLB_400: l2-tlb {

				qcom,dump-size = <0x7800>;

			};

		};
@@ -223,29 +144,6 @@ 
			      compatible = "arm,arch-cache";

			      cache-level = <2>;

			      next-level-cache = <&L3_0>;

			      qcom,dump-size = <0x88000>;

			};



			L1_I_500: l1-icache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x11000>;

			};



			L1_D_500: l1-dcache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x12000>;

			};



			L1_ITLB_500: l1-itlb {

				qcom,dump-size = <0x300>;

			};



			L1_DTLB_500: l1-dtlb {

				qcom,dump-size = <0x480>;

			};



			L2_TLB_500: l2-tlb {

				qcom,dump-size = <0x7800>;

			};

		};
@@ -262,29 +160,6 @@ 
			      compatible = "arm,arch-cache";

			      cache-level = <2>;

			      next-level-cache = <&L3_0>;

			      qcom,dump-size = <0x88000>;

			};



			L1_I_600: l1-icache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x11000>;

			};



			L1_D_600: l1-dcache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x12000>;

			};



			L1_ITLB_600: l1-itlb {

				qcom,dump-size = <0x300>;

			};



			L1_DTLB_600: l1-dtlb {

				qcom,dump-size = <0x480>;

			};



			L2_TLB_600: l2-tlb {

				qcom,dump-size = <0x7800>;

			};

		};
@@ -301,29 +176,6 @@ 
			      compatible = "arm,arch-cache";

			      cache-level = <2>;

			      next-level-cache = <&L3_0>;

			      qcom,dump-size = <0x110000>;

			};



			L1_I_700: l1-icache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x11000>;

			};



			L1_D_700: l1-dcache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x12000>;

			};



			L1_ITLB_700: l1-itlb {

				qcom,dump-size = <0x300>;

			};



			L1_DTLB_700: l1-dtlb {

				qcom,dump-size = <0x480>;

			};



			L2_TLB_700: l2-tlb {

				qcom,dump-size = <0x7800>;

			};

		};
@@ -546,6 +398,7 @@ 


		dump_mem: mem_dump_region {

			compatible = "shared-dma-pool";

			alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;

			reusable;

			size = <0 0x2400000>;

		};
@@ -2275,6 +2128,241 @@ 
		qcom,config-arr = <0x18040060 0x18050060

					0x18060060 0x18070060>;

	};



	mem_dump {

		compatible = "qcom,mem-dump";

		memory-region = <&dump_mem>;



		rpmh {

			qcom,dump-size = <0x2000000>;

			qcom,dump-id = <0xec>;

		};



		rpm_sw {

			qcom,dump-size = <0x28000>;

			qcom,dump-id = <0xea>;

		};



		pmic {

			qcom,dump-size = <0x80000>;

			qcom,dump-id = <0xe4>;

		};



		fcm {

			qcom,dump-size = <0x8400>;

			qcom,dump-id = <0xee>;

		};



		tmc_etf {

			qcom,dump-size = <0x10000>;

			qcom,dump-id = <0xf0>;

		};



		etf_swao {

			qcom,dump-size = <0x8400>;

			qcom,dump-id = <0xf1>;

		};



		etr_reg {

			qcom,dump-size = <0x1000>;

			qcom,dump-id = <0x100>;

		};



		etf_reg {

			qcom,dump-size = <0x1000>;

			qcom,dump-id = <0x101>;

		};



		etfswao_reg {

			qcom,dump-size = <0x1000>;

			qcom,dump-id = <0x102>;

		};



		misc_data {

			qcom,dump-size = <0x1000>;

			qcom,dump-id = <0xe8>;

		};



		l1_icache0 {

			qcom,dump-size = <0x8800>;

			qcom,dump-id = <0x60>;

		};



		l1_icache100 {

			qcom,dump-size = <0x8800>;

			qcom,dump-id = <0x61>;

		};



		l1_icache200 {

			qcom,dump-size = <0x8800>;

			qcom,dump-id = <0x62>;

		};



		l1_icache300 {

			qcom,dump-size = <0x8800>;

			qcom,dump-id = <0x63>;

		};



		l1_icache400 {

			qcom,dump-size = <0x11000>;

			qcom,dump-id = <0x64>;

		};



		l1_icache500 {

			qcom,dump-size = <0x11000>;

			qcom,dump-id = <0x65>;

		};



		l1_icache600 {

			qcom,dump-size = <0x11000>;

			qcom,dump-id = <0x66>;

		};



		l1_icache700 {

			qcom,dump-size = <0x11000>;

			qcom,dump-id = <0x67>;

		};



		l1_dcache0 {

			qcom,dump-size = <0x9000>;

			qcom,dump-id = <0x80>;

		};



		l1_dcache100 {

			qcom,dump-size = <0x9000>;

			qcom,dump-id = <0x81>;

		};



		l1_dcache200 {

			qcom,dump-size = <0x9000>;

			qcom,dump-id = <0x82>;

		};



		l1_dcache300 {

			qcom,dump-size = <0x9000>;

			qcom,dump-id = <0x83>;

		};



		l1_dcache400 {

			qcom,dump-size = <0x12000>;

			qcom,dump-id = <0x84>;

		};



		l1_dcache500 {

			qcom,dump-size = <0x12000>;

			qcom,dump-id = <0x85>;

		};



		l1_dcache600 {

			qcom,dump-size = <0x12000>;

			qcom,dump-id = <0x86>;

		};



		l1_dcache700 {

			qcom,dump-size = <0x12000>;

			qcom,dump-id = <0x87>;

		};



		l1_itlb400 {

			qcom,dump-size = <0x300>;

			qcom,dump-id = <0x24>;

		};



		l1_itlb500 {

			qcom,dump-size = <0x300>;

			qcom,dump-id = <0x25>;

		};



		l1_itlb600 {

			qcom,dump-size = <0x300>;

			qcom,dump-id = <0x26>;

		};



		l1_itlb700 {

			qcom,dump-size = <0x300>;

			qcom,dump-id = <0x27>;

		};



		l1_dtlb400 {

			qcom,dump-size = <0x480>;

			qcom,dump-id = <0x44>;

		};



		l1_dtlb500 {

			qcom,dump-size = <0x480>;

			qcom,dump-id = <0x45>;

		};



		l1_dtlb600 {

			qcom,dump-size = <0x480>;

			qcom,dump-id = <0x46>;

		};



		l1_dtlb700 {

			qcom,dump-size = <0x480>;

			qcom,dump-id = <0x47>;

		};



		l2_cache400 {

			qcom,dump-size = <0x88000>;

			qcom,dump-id = <0xc4>;

		};



		l2_cache500 {

			qcom,dump-size = <0x88000>;

			qcom,dump-id = <0xc5>;

		};



		l2_cache600 {

			qcom,dump-size = <0x88000>;

			qcom,dump-id = <0xc6>;

		};



		l2_cache700 {

			qcom,dump-size = <0x110000>;

			qcom,dump-id = <0xc7>;

		};



		l2_tlb0 {

			qcom,dump-size = <0x5000>;

			qcom,dump-id = <0x120>;

		};



		l2_tlb100 {

			qcom,dump-size = <0x5000>;

			qcom,dump-id = <0x121>;

		};



		l2_tlb200 {

			qcom,dump-size = <0x5000>;

			qcom,dump-id = <0x122>;

		};



		l2_tlb300 {

			qcom,dump-size = <0x5000>;

			qcom,dump-id = <0x123>;

		};



		l2_tlb400 {

			qcom,dump-size = <0x7800>;

			qcom,dump-id = <0x124>;

		};



		l2_tlb500 {

			qcom,dump-size = <0x7800>;

			qcom,dump-id = <0x125>;

		};



		l2_tlb600 {

			qcom,dump-size = <0x7800>;

			qcom,dump-id = <0x126>;

		};



		l2_tlb700 {

			qcom,dump-size = <0x7800>;

			qcom,dump-id = <0x127>;

		};

	};

};



&firmware {