Loading qcom/sa8155.dtsi +64 −2 Original line number Diff line number Diff line Loading @@ -62,6 +62,64 @@ read-only; ranges; }; mtl_rx_setup: rx-queues-config { snps,rx-queues-to-use = <4>; snps,rx-sched-sp; queue0 { snps,dcb-algorithm; snps,map-to-dma-channel = <0x0>; snps,route-up; snps,priority = <0x1>; }; queue1 { snps,dcb-algorithm; snps,map-to-dma-channel = <0x1>; snps,route-ptp; }; queue2 { snps,avb-algorithm; snps,map-to-dma-channel = <0x2>; snps,route-avcp; }; queue3 { snps,avb-algorithm; snps,map-to-dma-channel = <0x3>; snps,priority = <0xC>; }; }; mtl_tx_setup: tx-queues-config { snps,tx-queues-to-use = <5>; snps,tx-sched-sp; queue0 { snps,dcb-algorithm; }; queue1 { snps,dcb-algorithm; }; queue2 { snps,avb-algorithm; snps,send_slope = <0x1000>; snps,idle_slope = <0x1000>; snps,high_credit = <0x3E800>; snps,low_credit = <0xFFC18000>; }; queue3 { snps,avb-algorithm; snps,send_slope = <0x1000>; snps,idle_slope = <0x1000>; snps,high_credit = <0x3E800>; snps,low_credit = <0xFFC18000>; }; }; ethqos_hw: qcom,ethernet@00020000 { compatible = "qcom,stmmac-ethqos"; qcom,arm-smmu; Loading @@ -74,13 +132,17 @@ <&gcc GCC_EMAC_PTP_CLK>, <&gcc GCC_EMAC_RGMII_CLK>; clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii"; snps,ptp-ref-clk-rate = <250000000>; snps,ptp-req-clk-rate = <96000000>; interrupts-extended = <&intc 0 689 4>, <&intc 0 699 4>, <&tlmm 124 2>; interrupt-names = "macirq", "eth_lpi", "phy-intr"; snps,tso; rx-fifo-depth = <4096>; tx-fifo-depth = <4096>; rx-fifo-depth = <16384>; tx-fifo-depth = <32768>; snps,mtl-rx-config = <&mtl_rx_setup>; snps,mtl-tx-config = <&mtl_tx_setup>; snps,reset-gpios = <&tlmm 79 GPIO_ACTIVE_HIGH>; qcom,phy-intr-redirect = <&tlmm 124 GPIO_ACTIVE_LOW>; gdsc_emac-supply = <&emac_gdsc>; Loading Loading
qcom/sa8155.dtsi +64 −2 Original line number Diff line number Diff line Loading @@ -62,6 +62,64 @@ read-only; ranges; }; mtl_rx_setup: rx-queues-config { snps,rx-queues-to-use = <4>; snps,rx-sched-sp; queue0 { snps,dcb-algorithm; snps,map-to-dma-channel = <0x0>; snps,route-up; snps,priority = <0x1>; }; queue1 { snps,dcb-algorithm; snps,map-to-dma-channel = <0x1>; snps,route-ptp; }; queue2 { snps,avb-algorithm; snps,map-to-dma-channel = <0x2>; snps,route-avcp; }; queue3 { snps,avb-algorithm; snps,map-to-dma-channel = <0x3>; snps,priority = <0xC>; }; }; mtl_tx_setup: tx-queues-config { snps,tx-queues-to-use = <5>; snps,tx-sched-sp; queue0 { snps,dcb-algorithm; }; queue1 { snps,dcb-algorithm; }; queue2 { snps,avb-algorithm; snps,send_slope = <0x1000>; snps,idle_slope = <0x1000>; snps,high_credit = <0x3E800>; snps,low_credit = <0xFFC18000>; }; queue3 { snps,avb-algorithm; snps,send_slope = <0x1000>; snps,idle_slope = <0x1000>; snps,high_credit = <0x3E800>; snps,low_credit = <0xFFC18000>; }; }; ethqos_hw: qcom,ethernet@00020000 { compatible = "qcom,stmmac-ethqos"; qcom,arm-smmu; Loading @@ -74,13 +132,17 @@ <&gcc GCC_EMAC_PTP_CLK>, <&gcc GCC_EMAC_RGMII_CLK>; clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii"; snps,ptp-ref-clk-rate = <250000000>; snps,ptp-req-clk-rate = <96000000>; interrupts-extended = <&intc 0 689 4>, <&intc 0 699 4>, <&tlmm 124 2>; interrupt-names = "macirq", "eth_lpi", "phy-intr"; snps,tso; rx-fifo-depth = <4096>; tx-fifo-depth = <4096>; rx-fifo-depth = <16384>; tx-fifo-depth = <32768>; snps,mtl-rx-config = <&mtl_rx_setup>; snps,mtl-tx-config = <&mtl_tx_setup>; snps,reset-gpios = <&tlmm 79 GPIO_ACTIVE_HIGH>; qcom,phy-intr-redirect = <&tlmm 124 GPIO_ACTIVE_LOW>; gdsc_emac-supply = <&emac_gdsc>; Loading