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Commit 7067739d authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'i2c/for-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux 

Pull i2c updates from Wolfram Sang:
 "I2C has for you two new drivers (Tegra BPMP and STM32F4), interrupt
  support for pca954x muxes, and a bunch of driver bugfixes and
  improvements. Nothing really special this cycle.

  A few commits have been added to my tree just recently. Those are the
  Tegra BPMP driver and a few straightforward bugfixes or cleanups which
  I prefer to have upstream rather soonish. The rest had proper
  linux-next exposure"

* 'i2c/for-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (25 commits)
  i2c: thunderx: Replace pci_enable_msix()
  i2c: exynos5: fix arbitration lost handling
  i2c: exynos5: disable fifo-almost-empty irq signal when necessary
  i2c: at91: ensure state is restored after suspending
  i2c: bcm2835: Avoid possible NULL ptr dereference
  i2c: Add Tegra BPMP I2C proxy driver
  dt-bindings: Add Tegra186 BPMP I2C binding
  misc: eeprom: at24: use device_property_*() functions instead of of_get_property()
  i2c: mux: pca954x: Add interrupt controller support
  dt: bindings: i2c-mux-pca954x: Add documentation for interrupt controller
  i2c: mux: pca954x: Add missing pca9542 definition to chip_desc
  i2c: riic: correctly finish transfers
  i2c: i801: Add support for Intel Gemini Lake
  i2c: mux: pca9541: Export OF device ID table as module aliases
  i2c: mux: pca954x: Export OF device ID table as module aliases
  i2c: mux: mlxcpld: remove unused including <linux/version.h>
  i2c: busses: constify i2c_algorithm structures
  i2c: i2c-mux-gpio: rename i2c-gpio-mux to i2c-mux-gpio
  i2c: sh_mobile: document support for r8a7796 (R-Car M3-W)
  i2c: i2c-cros-ec-tunnel: Reduce logging noise
  ...
parents ac1820fb 4c21541d

Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt

+13 −1
Original line number Diff line number Diff line
@@ -19,7 +19,14 @@ Optional Properties: 
  - i2c-mux-idle-disconnect: Boolean; if defined, forces mux to disconnect all

    children in idle state. This is necessary for example, if there are several

    multiplexers on the bus and the devices behind them use same I2C addresses.



  - interrupt-parent: Phandle for the interrupt controller that services

    interrupts for this device.

  - interrupts: Interrupt mapping for IRQ.

  - interrupt-controller: Marks the device node as an interrupt controller.

  - #interrupt-cells : Should be two.

    - first cell is the pin number

    - second cell is used to specify flags.

    See also Documentation/devicetree/bindings/interrupt-controller/interrupts.txt



Example:
@@ -29,6 +36,11 @@ Example: 
		#size-cells = <0>;

		reg = <0x74>;



		interrupt-parent = <&ipic>;

		interrupts = <17 IRQ_TYPE_LEVEL_LOW>;

		interrupt-controller;

		#interrupt-cells = <2>;



		i2c@2 {

			#address-cells = <1>;

			#size-cells = <0>;

Documentation/devicetree/bindings/i2c/i2c-sh_mobile.txt

+1 −0
Original line number Diff line number Diff line
@@ -10,6 +10,7 @@ Required properties: 
			- "renesas,iic-r8a7793" (R-Car M2-N)

			- "renesas,iic-r8a7794" (R-Car E2)

			- "renesas,iic-r8a7795" (R-Car H3)

			- "renesas,iic-r8a7796" (R-Car M3-W)

			- "renesas,iic-sh73a0" (SH-Mobile AG5)

			- "renesas,rcar-gen2-iic" (generic R-Car Gen2 compatible device)

			- "renesas,rcar-gen3-iic" (generic R-Car Gen3 compatible device)

Documentation/devicetree/bindings/i2c/i2c-stm32.txt

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+33 −0
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* I2C controller embedded in STMicroelectronics STM32 I2C platform



Required properties :

- compatible : Must be "st,stm32f4-i2c"

- reg : Offset and length of the register set for the device

- interrupts : Must contain the interrupt id for I2C event and then the

  interrupt id for I2C error.

- resets: Must contain the phandle to the reset controller.

- clocks: Must contain the input clock of the I2C instance.

- A pinctrl state named "default" must be defined to set pins in mode of

  operation for I2C transfer

- #address-cells = <1>;

- #size-cells = <0>;



Optional properties :

- clock-frequency : Desired I2C bus clock frequency in Hz. If not specified,

  the default 100 kHz frequency will be used. As only Normal and Fast modes

  are supported, possible values are 100000 and 400000.



Example :



	i2c@40005400 {

		compatible = "st,stm32f4-i2c";

		#address-cells = <1>;

		#size-cells = <0>;

		reg = <0x40005400 0x400>;

		interrupts = <31>,

			     <32>;

		resets = <&rcc 277>;

		clocks = <&rcc 0 149>;

		pinctrl-0 = <&i2c1_sda_pin>, <&i2c1_scl_pin>;

		pinctrl-names = "default";

	};

Documentation/devicetree/bindings/i2c/nvidia,tegra186-bpmp-i2c.txt

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+42 −0
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NVIDIA Tegra186 BPMP I2C controller



In Tegra186, the BPMP (Boot and Power Management Processor) owns certain HW

devices, such as the I2C controller for the power management I2C bus. Software

running on other CPUs must perform IPC to the BPMP in order to execute

transactions on that I2C bus. This binding describes an I2C bus that is

accessed in such a fashion.



The BPMP I2C node must be located directly inside the main BPMP node. See

../firmware/nvidia,tegra186-bpmp.txt for details of the BPMP binding.



This node represents an I2C controller. See ../i2c/i2c.txt for details of the

core I2C binding.



Required properties:

- compatible:

    Array of strings.

    One of:

    - "nvidia,tegra186-bpmp-i2c".

- #address-cells: Address cells for I2C device address.

    Single-cell integer.

    Must be <1>.

- #size-cells:

    Single-cell integer.

    Must be <0>.

- nvidia,bpmp-bus-id:

    Single-cell integer.

    Indicates the I2C bus number this DT node represent, as defined by the

    BPMP firmware.



Example:



bpmp {

	...



	i2c {

		compatible = "nvidia,tegra186-bpmp-i2c";

		#address-cells = <1>;

		#size-cells = <0>;

		nvidia,bpmp-bus-id = <5>;

	};

};

Documentation/i2c/busses/i2c-i801

+1 −0
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@@ -33,6 +33,7 @@ Supported adapters: 
  * Intel DNV (SOC)

  * Intel Broxton (SOC)

  * Intel Lewisburg (PCH)

  * Intel Gemini Lake (SOC)

   Datasheets: Publicly available at the Intel website



On Intel Patsburg and later chipsets, both the normal host SMBus controller