Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Unverified Commit 704c1455 authored by Mark Brown's avatar Mark Brown
Browse files

Merge remote-tracking branches 'spi/topic/armada', 'spi/topic/axi',... 

Merge remote-tracking branches 'spi/topic/armada', 'spi/topic/axi', 'spi/topic/davinci' and 'spi/topic/fsl-dspi' into spi-next
parents b5f9208d dd7aa8d4 4d5e0689 32c30f73 ec7ed770

Documentation/devicetree/bindings/spi/spi-davinci.txt

+10 −0
Original line number Diff line number Diff line
@@ -24,6 +24,16 @@ Required properties: 
	based on a specific SoC configuration.

- interrupts: interrupt number mapped to CPU.

- clocks: spi clk phandle

          For 66AK2G this property should be set per binding,

          Documentation/devicetree/bindings/clock/ti,sci-clk.txt



SoC-specific Required Properties:



The following are mandatory properties for Keystone 2 66AK2G SoCs only:



- power-domains:	Should contain a phandle to a PM domain provider node

			and an args specifier containing the SPI device id

			value. This property is as per the binding,



Optional:

- cs-gpios: gpio chip selects

drivers/spi/Kconfig

+1 −1
Original line number Diff line number Diff line
@@ -379,7 +379,7 @@ config SPI_FSL_DSPI 
	tristate "Freescale DSPI controller"

	select REGMAP_MMIO

	depends on HAS_DMA

	depends on SOC_VF610 || SOC_LS1021A || ARCH_LAYERSCAPE || COMPILE_TEST

	depends on SOC_VF610 || SOC_LS1021A || ARCH_LAYERSCAPE || M5441x || COMPILE_TEST

	help

	  This enables support for the Freescale DSPI controller in master

	  mode. VF610 platform uses the controller.

drivers/spi/spi-armada-3700.c

+4 −13
Original line number Diff line number Diff line
@@ -213,7 +213,7 @@ static void a3700_spi_mode_set(struct a3700_spi *a3700_spi, 
}



static void a3700_spi_clock_set(struct a3700_spi *a3700_spi,

				unsigned int speed_hz, u16 mode)

				unsigned int speed_hz)

{

	u32 val;

	u32 prescale;
@@ -231,17 +231,6 @@ static void a3700_spi_clock_set(struct a3700_spi *a3700_spi, 
		val |= A3700_SPI_CLK_CAPT_EDGE;

		spireg_write(a3700_spi, A3700_SPI_IF_TIME_REG, val);

	}



	val = spireg_read(a3700_spi, A3700_SPI_IF_CFG_REG);

	val &= ~(A3700_SPI_CLK_POL | A3700_SPI_CLK_PHA);



	if (mode & SPI_CPOL)

		val |= A3700_SPI_CLK_POL;



	if (mode & SPI_CPHA)

		val |= A3700_SPI_CLK_PHA;



	spireg_write(a3700_spi, A3700_SPI_IF_CFG_REG, val);

}



static void a3700_spi_bytelen_set(struct a3700_spi *a3700_spi, unsigned int len)
@@ -423,7 +412,7 @@ static void a3700_spi_transfer_setup(struct spi_device *spi, 


	a3700_spi = spi_master_get_devdata(spi->master);



	a3700_spi_clock_set(a3700_spi, xfer->speed_hz, spi->mode);

	a3700_spi_clock_set(a3700_spi, xfer->speed_hz);



	byte_len = xfer->bits_per_word >> 3;
@@ -584,6 +573,8 @@ static int a3700_spi_prepare_message(struct spi_master *master, 


	a3700_spi_bytelen_set(a3700_spi, 4);



	a3700_spi_mode_set(a3700_spi, spi->mode);



	return 0;

}

drivers/spi/spi-axi-spi-engine.c

+3 −1
Original line number Diff line number Diff line
@@ -553,7 +553,7 @@ static int spi_engine_probe(struct platform_device *pdev) 


static int spi_engine_remove(struct platform_device *pdev)

{

	struct spi_master *master = platform_get_drvdata(pdev);

	struct spi_master *master = spi_master_get(platform_get_drvdata(pdev));

	struct spi_engine *spi_engine = spi_master_get_devdata(master);

	int irq = platform_get_irq(pdev, 0);
@@ -561,6 +561,8 @@ static int spi_engine_remove(struct platform_device *pdev) 


	free_irq(irq, master);



	spi_master_put(master);



	writel_relaxed(0xff, spi_engine->base + SPI_ENGINE_REG_INT_PENDING);

	writel_relaxed(0x00, spi_engine->base + SPI_ENGINE_REG_INT_ENABLE);

	writel_relaxed(0x01, spi_engine->base + SPI_ENGINE_REG_RESET);

drivers/spi/spi-fsl-dspi.c

+45 −21
Original line number Diff line number Diff line
@@ -32,6 +32,7 @@ 
#include <linux/regmap.h>

#include <linux/sched.h>

#include <linux/spi/spi.h>

#include <linux/spi/spi-fsl-dspi.h>

#include <linux/spi/spi_bitbang.h>

#include <linux/time.h>
@@ -151,6 +152,11 @@ static const struct fsl_dspi_devtype_data ls2085a_data = { 
	.max_clock_factor = 8,

};



static const struct fsl_dspi_devtype_data coldfire_data = {

	.trans_mode = DSPI_EOQ_MODE,

	.max_clock_factor = 8,

};



struct fsl_dspi_dma {

	/* Length of transfer in words of DSPI_FIFO_SIZE */

	u32 curr_xfer_len;
@@ -741,6 +747,7 @@ static int dspi_setup(struct spi_device *spi) 
{

	struct chip_data *chip;

	struct fsl_dspi *dspi = spi_master_get_devdata(spi->master);

	struct fsl_dspi_platform_data *pdata;

	u32 cs_sck_delay = 0, sck_cs_delay = 0;

	unsigned char br = 0, pbr = 0, pcssck = 0, cssck = 0;

	unsigned char pasc = 0, asc = 0, fmsz = 0;
@@ -761,11 +768,18 @@ static int dspi_setup(struct spi_device *spi) 
			return -ENOMEM;

	}



	pdata = dev_get_platdata(&dspi->pdev->dev);



	if (!pdata) {

		of_property_read_u32(spi->dev.of_node, "fsl,spi-cs-sck-delay",

				&cs_sck_delay);



		of_property_read_u32(spi->dev.of_node, "fsl,spi-sck-cs-delay",

				&sck_cs_delay);

	} else {

		cs_sck_delay = pdata->cs_sck_delay;

		sck_cs_delay = pdata->sck_cs_delay;

	}



	chip->mcr_val = SPI_MCR_MASTER | SPI_MCR_PCSIS |

		SPI_MCR_CLR_TXF | SPI_MCR_CLR_RXF;
@@ -949,6 +963,7 @@ static int dspi_probe(struct platform_device *pdev) 
	struct fsl_dspi *dspi;

	struct resource *res;

	void __iomem *base;

	struct fsl_dspi_platform_data *pdata;

	int ret = 0, cs_num, bus_num;



	master = spi_alloc_master(&pdev->dev, sizeof(struct fsl_dspi));
@@ -969,6 +984,14 @@ static int dspi_probe(struct platform_device *pdev) 
	master->bits_per_word_mask = SPI_BPW_MASK(4) | SPI_BPW_MASK(8) |

					SPI_BPW_MASK(16);



	pdata = dev_get_platdata(&pdev->dev);

	if (pdata) {

		master->num_chipselect = pdata->cs_num;

		master->bus_num = pdata->bus_num;



		dspi->devtype_data = &coldfire_data;

	} else {



		ret = of_property_read_u32(np, "spi-num-chipselects", &cs_num);

		if (ret < 0) {

			dev_err(&pdev->dev, "can't get spi-num-chipselects\n");
@@ -989,6 +1012,7 @@ static int dspi_probe(struct platform_device *pdev) 
			ret = -EFAULT;

			goto out_master_put;

		}

	}



	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);

	base = devm_ioremap_resource(&pdev->dev, res);