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Commit 701052c5 authored by Gal Pressman's avatar Gal Pressman Committed by Saeed Mahameed
Browse files

net/mlx5: Move cached hca caps to designated caps struct 



The caps structure consists of hca caps and port/management caps,
all under one roof.

Signed-off-by: default avatarGal Pressman <galp@mellanox.com>
Signed-off-by: default avatarSaeed Mahameed <saeedm@mellanox.com>
parent 0f7f3481

drivers/net/ethernet/mellanox/mlx5/core/fs_core.c

+1 −1
Original line number Diff line number Diff line
@@ -1665,7 +1665,7 @@ static int create_leaf_prios(struct mlx5_flow_namespace *ns, int prio, 


#define FLOW_TABLE_BIT_SZ 1

#define GET_FLOW_TABLE_CAP(dev, offset) \

	((be32_to_cpu(*((__be32 *)(dev->hca_caps_cur[MLX5_CAP_FLOW_TABLE]) +	\

	((be32_to_cpu(*((__be32 *)(dev->caps.hca_cur[MLX5_CAP_FLOW_TABLE]) +	\

			offset / 32)) >>					\

	  (32 - FLOW_TABLE_BIT_SZ - (offset & 0x1f))) & FLOW_TABLE_BIT_SZ)

static bool has_required_caps(struct mlx5_core_dev *dev, struct node_caps *caps)

drivers/net/ethernet/mellanox/mlx5/core/main.c

+3 −3
Original line number Diff line number Diff line
@@ -418,11 +418,11 @@ static int mlx5_core_get_caps_mode(struct mlx5_core_dev *dev, 


	switch (cap_mode) {

	case HCA_CAP_OPMOD_GET_MAX:

		memcpy(dev->hca_caps_max[cap_type], hca_caps,

		memcpy(dev->caps.hca_max[cap_type], hca_caps,

		       MLX5_UN_SZ_BYTES(hca_cap_union));

		break;

	case HCA_CAP_OPMOD_GET_CUR:

		memcpy(dev->hca_caps_cur[cap_type], hca_caps,

		memcpy(dev->caps.hca_cur[cap_type], hca_caps,

		       MLX5_UN_SZ_BYTES(hca_cap_union));

		break;

	default:
@@ -513,7 +513,7 @@ static int handle_hca_cap(struct mlx5_core_dev *dev) 


	set_hca_cap = MLX5_ADDR_OF(set_hca_cap_in, set_ctx,

				   capability);

	memcpy(set_hca_cap, dev->hca_caps_cur[MLX5_CAP_GENERAL],

	memcpy(set_hca_cap, dev->caps.hca_cur[MLX5_CAP_GENERAL],

	       MLX5_ST_SZ_BYTES(cmd_hca_cap));



	mlx5_core_dbg(dev, "Current Pkey table size %d Setting new size %d\n",

include/linux/mlx5/device.h

+17 −17
Original line number Diff line number Diff line
@@ -988,36 +988,36 @@ enum mlx5_mcam_feature_groups { 


/* GET Dev Caps macros */

#define MLX5_CAP_GEN(mdev, cap) \

	MLX5_GET(cmd_hca_cap, mdev->hca_caps_cur[MLX5_CAP_GENERAL], cap)

	MLX5_GET(cmd_hca_cap, mdev->caps.hca_cur[MLX5_CAP_GENERAL], cap)



#define MLX5_CAP_GEN_MAX(mdev, cap) \

	MLX5_GET(cmd_hca_cap, mdev->hca_caps_max[MLX5_CAP_GENERAL], cap)

	MLX5_GET(cmd_hca_cap, mdev->caps.hca_max[MLX5_CAP_GENERAL], cap)



#define MLX5_CAP_ETH(mdev, cap) \

	MLX5_GET(per_protocol_networking_offload_caps,\

		 mdev->hca_caps_cur[MLX5_CAP_ETHERNET_OFFLOADS], cap)

		 mdev->caps.hca_cur[MLX5_CAP_ETHERNET_OFFLOADS], cap)



#define MLX5_CAP_ETH_MAX(mdev, cap) \

	MLX5_GET(per_protocol_networking_offload_caps,\

		 mdev->hca_caps_max[MLX5_CAP_ETHERNET_OFFLOADS], cap)

		 mdev->caps.hca_max[MLX5_CAP_ETHERNET_OFFLOADS], cap)



#define MLX5_CAP_ROCE(mdev, cap) \

	MLX5_GET(roce_cap, mdev->hca_caps_cur[MLX5_CAP_ROCE], cap)

	MLX5_GET(roce_cap, mdev->caps.hca_cur[MLX5_CAP_ROCE], cap)



#define MLX5_CAP_ROCE_MAX(mdev, cap) \

	MLX5_GET(roce_cap, mdev->hca_caps_max[MLX5_CAP_ROCE], cap)

	MLX5_GET(roce_cap, mdev->caps.hca_max[MLX5_CAP_ROCE], cap)



#define MLX5_CAP_ATOMIC(mdev, cap) \

	MLX5_GET(atomic_caps, mdev->hca_caps_cur[MLX5_CAP_ATOMIC], cap)

	MLX5_GET(atomic_caps, mdev->caps.hca_cur[MLX5_CAP_ATOMIC], cap)



#define MLX5_CAP_ATOMIC_MAX(mdev, cap) \

	MLX5_GET(atomic_caps, mdev->hca_caps_max[MLX5_CAP_ATOMIC], cap)

	MLX5_GET(atomic_caps, mdev->caps.hca_max[MLX5_CAP_ATOMIC], cap)



#define MLX5_CAP_FLOWTABLE(mdev, cap) \

	MLX5_GET(flow_table_nic_cap, mdev->hca_caps_cur[MLX5_CAP_FLOW_TABLE], cap)

	MLX5_GET(flow_table_nic_cap, mdev->caps.hca_cur[MLX5_CAP_FLOW_TABLE], cap)



#define MLX5_CAP_FLOWTABLE_MAX(mdev, cap) \

	MLX5_GET(flow_table_nic_cap, mdev->hca_caps_max[MLX5_CAP_FLOW_TABLE], cap)

	MLX5_GET(flow_table_nic_cap, mdev->caps.hca_max[MLX5_CAP_FLOW_TABLE], cap)



#define MLX5_CAP_FLOWTABLE_NIC_RX(mdev, cap) \

	MLX5_CAP_FLOWTABLE(mdev, flow_table_properties_nic_receive.cap)
@@ -1039,11 +1039,11 @@ enum mlx5_mcam_feature_groups { 


#define MLX5_CAP_ESW_FLOWTABLE(mdev, cap) \

	MLX5_GET(flow_table_eswitch_cap, \

		 mdev->hca_caps_cur[MLX5_CAP_ESWITCH_FLOW_TABLE], cap)

		 mdev->caps.hca_cur[MLX5_CAP_ESWITCH_FLOW_TABLE], cap)



#define MLX5_CAP_ESW_FLOWTABLE_MAX(mdev, cap) \

	MLX5_GET(flow_table_eswitch_cap, \

		 mdev->hca_caps_max[MLX5_CAP_ESWITCH_FLOW_TABLE], cap)

		 mdev->caps.hca_max[MLX5_CAP_ESWITCH_FLOW_TABLE], cap)



#define MLX5_CAP_ESW_FLOWTABLE_FDB(mdev, cap) \

	MLX5_CAP_ESW_FLOWTABLE(mdev, flow_table_properties_nic_esw_fdb.cap)
@@ -1065,21 +1065,21 @@ enum mlx5_mcam_feature_groups { 


#define MLX5_CAP_ESW(mdev, cap) \

	MLX5_GET(e_switch_cap, \

		 mdev->hca_caps_cur[MLX5_CAP_ESWITCH], cap)

		 mdev->caps.hca_cur[MLX5_CAP_ESWITCH], cap)



#define MLX5_CAP_ESW_MAX(mdev, cap) \

	MLX5_GET(e_switch_cap, \

		 mdev->hca_caps_max[MLX5_CAP_ESWITCH], cap)

		 mdev->caps.hca_max[MLX5_CAP_ESWITCH], cap)



#define MLX5_CAP_ODP(mdev, cap)\

	MLX5_GET(odp_cap, mdev->hca_caps_cur[MLX5_CAP_ODP], cap)

	MLX5_GET(odp_cap, mdev->caps.hca_cur[MLX5_CAP_ODP], cap)



#define MLX5_CAP_VECTOR_CALC(mdev, cap) \

	MLX5_GET(vector_calc_cap, \

		 mdev->hca_caps_cur[MLX5_CAP_VECTOR_CALC], cap)

		 mdev->caps.hca_cur[MLX5_CAP_VECTOR_CALC], cap)



#define MLX5_CAP_QOS(mdev, cap)\

	MLX5_GET(qos_cap, mdev->hca_caps_cur[MLX5_CAP_QOS], cap)

	MLX5_GET(qos_cap, mdev->caps.hca_cur[MLX5_CAP_QOS], cap)



#define MLX5_CAP_PCAM_FEATURE(mdev, fld) \

	MLX5_GET(pcam_reg, (mdev)->caps.pcam, feature_cap_mask.enhanced_features.fld)

include/linux/mlx5/driver.h

+2 −2
Original line number Diff line number Diff line
@@ -738,9 +738,9 @@ struct mlx5_core_dev { 
	char			board_id[MLX5_BOARD_ID_LEN];

	struct mlx5_cmd		cmd;

	struct mlx5_port_caps	port_caps[MLX5_MAX_PORTS];

	u32 hca_caps_cur[MLX5_CAP_NUM][MLX5_UN_SZ_DW(hca_cap_union)];

	u32 hca_caps_max[MLX5_CAP_NUM][MLX5_UN_SZ_DW(hca_cap_union)];

	struct {

		u32 hca_cur[MLX5_CAP_NUM][MLX5_UN_SZ_DW(hca_cap_union)];

		u32 hca_max[MLX5_CAP_NUM][MLX5_UN_SZ_DW(hca_cap_union)];

		u32 pcam[MLX5_ST_SZ_DW(pcam_reg)];

		u32 mcam[MLX5_ST_SZ_DW(mcam_reg)];

	} caps;